Hi, i am working on a Sigma Delta ADC with sky130A technology. This is my repo link: https://github.com/filippocarastro/SigmaDelta_ADC I have some problems with integrator. Sigma Delta has a testbench inside xschem folder and the simulation result under sim_res folder. Someone can help me to verify this IP?

I’m happy to help you if you can describe what issues you’re having with your integrator. Have you simulated your design at a more abstracted level first such as Octave or Matlab or C?

No, I don’t. My integrator not “integrate” correctly the signal. If you simulate it and watch at the output of integ you can see that

Have you checked the basics like the input/output common-mode voltages? They should typically be somewhere around mid-rail. Then check all the operating points of the transistors and make sure they’re all saturated and are carrying the current that you expect. These are the first things I would check. If your common-mode voltages are off, something could be wrong with your common-mode feedback.

Okay thank you, have you a paper to look and understand how to make this thing?

If you’re new to Delta-Sigma, a good place to start is a book like this, which you may be able to find at a university library: Understanding Delta-Sigma Data Converters https://a.co/d/iThUYoR

Let me know if you need help with dsm. Be careful about the negative feedback DAC.

Ok thanks, now I try to model it in Matlab