Chip-7 <https://github.com/AndalibN/Electrochemica...
# ieee-sscs-dc-22
The top cell in the gds is
user_analog_project_wrapper_wo_PA
instead of
user_analog_project_wrapper
👍🏽 1
There a soft connection to ground through psubstrate.
👍🏽 1
a
@Mitch Bailey thanks for looking into our gds file. When I open the gds you have it shows the top cell name as
user_analog_project_wrapper
. I also opened it in Magic and it showed the same top cell name. Could you show me how you see the name as
user_analog_project_wrapper_wo_PA
? I think that may be the source of my Consistency error on precheck.
image.png
m
Looks like I cloned the repo the day before the data was updated. I’ll try again with the most recent data.
a
Thanks again!
m
I can open your gds in klayout, but magic gives me
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Error while reading cell "(UNNAMED)" (byte position 4): Unexpected record type in input: 
    Expected HEADER record but got 69.
freeMagic called with NULL argument.
If your original layout is in magic, can you delete
(UNNAMED)
? This is the data I’m using.
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$ cksum Electrochemical-Water-Quality-Monitoring/gds/user_analog_project_wrapper.gds 
2896578061 104859 Electrochemical-Water-Quality-Monitoring/gds/user_analog_project_wrapper.gds
a
@Mitch Bailey, my original layout was in Magic, but during the DRC checks in KLayout, I have modified it quite a bit. It does not show any error like that in Magic. I have uploaded it on github: https://github.com/AndalibN/Electrochemical-Water-Quality-Monitoring/blob/b032148c[…]251aea4d20ac77496c232660/gds/user_analog_project_wrapper.gds.gz
m
Thanks, I’ll look at it later. Just to clarify, you can read the GDS (not mag) in magic without errors, right?
a
Yes, I am reading this GDS in Magic without any unnamed cell error. This is the first part of the Tkcon message that appears when I load it in Magic:
m
Is it the exact same file that’s in the repo
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$ cksum gds/user_analog_project_wrapper.gds 
3511852074 9011034 gds/user_analog_project_wrapper.gds
a
the gds directory has two files. the .gds file is the one you checked before. The .gds.gz is the latest one that I have uploaded. Please check that one. This one should have that name fixed. If not, please let me know.
👍 1
m
@Andalib Nizam Sorry for the delay. I can not open that file. In klayout, I get a
Stream has unknown format
error. Is this the correct filesize and cksum?
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$ cksum gds/user_analog_project_wrapper.gds.gz
1679858244 5682697 gds/user_analog_project_wrapper.gds.gz
a
@Mitch Bailey, sorry about that. The gds is 34.9 MB so I was trying to zip it using this command:
tar -czf user_analog_project_wrapper.gds.gz user_analog_project_wrapper.gds
I tried to open it on my end just now, and I am also getting this error. Am I doing something wrong?
m
You probably just want to use
gzip user_analog_project_wrapper.gds
. Using
tar -czf
creates a compressed tar file that might be more recognizable as
user_analog_project_wrapper.tar.gz
or
user_analog_project_wrapper.tgz
. Since there’s only one file, I don’t see the need to use tar.
a
@Mitch Bailey, thank you. I just uploaded a new version of the gds.gz file. Please let me know if you still have issues with opening it. https://github.com/AndalibN/Electrochemical-Water-Quality-Monitoring/tree/main/gds
m
@Andalib Nizam I’m still showing this error
@Andalib Nizam Trying to run LVS, but missing these symbols used in the schematic. Is it possible to get these?
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/research/mlab/chipathon/Final_schematic/BGR_schematic.sym
/research/mlab/chipathon/Final_schematic/biasAmp_simpClean.sym
/research/mlab/chipathon/Final_schematic/VCO.sym
/research/mlab/chipathon/Final_schematic/mixer_schematic.sym
/research/mlab/chipathon/Final_schematic/LNA.sym
/research/mlab/chipathon/Final_schematic/FilterOpAmp.sym
/research/mlab/chipathon/Final_schematic/TIA.sym
/research/mlab/chipathon/Final_schematic/rldo.sym
a
Hi @Mitch Bailey, Here is the google drive folder with all the schematics and symbols: https://drive.google.com/drive/folders/1MTb8eJMrgVSbYvdUzPcHujEbiX0hgbEw?usp=share_link And I am fixing the soft substrate connection right now. Did you see the wrapper name mismatch on the top cell still? Or is it fixed now?
m
Wrapper name was correct! Also, you probably don’t want to have
user_analog_project_wrapper.gds
and
user_analog_project_wrapper.gds.gz
in the same directory - it can cause confusion. I’ll try downloading the schematics.
a
That's good to know. I am planning to run an online precheck with the new gds in a few minutes, just to get an update on KLayout FEOL & BEOL errors. I will clean up the gds directory before that. Let me know if you face any issues regarding LVS.
m
Missing m2-m4 connection in tia.
Looks like the upper capacitor is missing a connection to m4 too.
a
@Mitch Bailey, on my end the capacitors have their metal connections. (see screenshot) I am confused why it is not showing at your end.
m
The connections are there, but they’re at a higher hierarchy. If you look at the tia cell by itself, it’s not connected. I was looking at an intermediate lvs result. Let me check the final.
Looks like the symbols in this directory are missing too.
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/research/mlab/chipathon/xschem_design_files/
The schematic
Liza_Tgate
,
Liza_enable
, and
pseudo
are missing the GND port.
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.subckt Liza_enable  EN Vin Vout ENinverted VDD
*.PININFO Vout:O Vin:I EN:I ENinverted:I VDD:B
XM3 Vout EN Vin GND sky130_fd_pr__nfet_01v8 L=0.15 W=.5 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=1 m=1
XM1 Vin ENinverted Vout VDD sky130_fd_pr__pfet_01v8 L=0.15 W=1 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
.ends

.subckt Liza_Tgate  CLK Vin Vout CLKinverted VDD
*.PININFO Vout:O Vin:I CLK:I CLKinverted:I VDD:B
XM3 Vout CLK Vin GND sky130_fd_pr__nfet_01v8 L=0.15 W=.5 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=1 m=1
XM4 Vin CLKinverted Vout VDD sky130_fd_pr__pfet_01v8 L=0.15 W=8 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
.ends

.subckt pseudo  VDD Vin Voutfinal Voutinverted
*.PININFO Vin:I Voutfinal:O Voutinverted:O VDD:B
XM1 Vout1 Vin GND GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=1 m=1
XM2 Vout1 Vin VDD VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=2 m=2
XM3 Vout2 Vin Vs5 VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=2 m=2
XM4 Vout2 Vin Vs4 GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=1 m=1
XM5 Vs5 Vout2 VDD VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=2 m=2
XM6 Vs4 Vout2 GND GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=1 m=1
XM7 Vout3 Vout1 Vs5 VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=2 m=2
XM8 Voutfinal Vout2 Vs11 VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2
XM9 Voutinverted Vout3 Vs11 VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2
XM10 Vs5 Vout3 VDD VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=2 m=2
XM11 Vs11 Voutfinal VDD VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2
XM12 Vs11 Voutinverted VDD VDD sky130_fd_pr__pfet_01v8 L=0.45 W=3 nf=2 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=2 m=2
XM13 Vout3 Vout1 Vs4 GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM14 Voutfinal Vout2 Vs14 GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM15 Voutinverted Vout3 Vs14 GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM16 Vs4 Vout3 GND GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29' as='int((nf+2)/2) * W/nf * 0.29'
+ pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)' nrd='0.29 / W' nrs='0.29 / W'
+ sa=0 sb=0 sd=0 mult=1 m=1
XM17 Vs14 Voutfinal GND GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
XM18 Vs14 Voutinverted GND GND sky130_fd_pr__nfet_01v8 L=0.45 W=1.13 nf=1 ad='int((nf+1)/2) * W/nf * 0.29'
+ as='int((nf+2)/2) * W/nf * 0.29' pd='2*int((nf+1)/2) * (W/nf + 0.29)' ps='2*int((nf+2)/2) * (W/nf + 0.29)'
+ nrd='0.29 / W' nrs='0.29 / W' sa=0 sb=0 sd=0 mult=1 m=1
.ends
a
@Mitch Bailey I uploaded the missing symbols in that directory. Please check and let me know if you miss any particular symbol, and I will upload that asap. For the GND pin, we fixed it recently and I uploaded the symbols also on the same google drive directory.
👍 1
m
Can I get the schematics for
Liza_Tgate
,
Liza_enable
, and
pseudo
too.
a
Just uploaded them in the drive folder.
👍 1
m
When I create a netlist in xschem, I get the following warnings. Is this expected?
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shorted: gpio_analog[2] - gpio_analog[3]
shorted: gpio_analog[12] - io_out[25]
shorted: gpio_analog[12] - VDD
shorted: vssa2 - GND
shorted: io_in[26] - Vb
shorted: io_in[26] - Vb
shorted: gpio_analog[1] - Vina
shorted: gpio_analog[0] - Vin
a
@Mitch Bailey yes, the gpio_analog[2] and [3] are shorted to supply to the RLDO IN. The other shorts are showing because of inductors in the PA block.
m
Thanks! I might be able to deal with the inductors if they’re in a separate layout cell.
Are the inductors in the schematic?
a
No, we removed the inductors from the schematic to pass LVS. The PA layout cell and the LNA layout cell, both have them on the wrapper.
m
I think the symbols (from google drive) I have for
Liza_Tgate
,
Liza_enable
, and
pseudo
are missing the GND terminal. The schematics are trying to connect GND but there’s nothing there. Maybe my copy is old.
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v {xschem version=3.0.0 file_version=1.2 }
G {}
K {type=subcircuit
format="@name @pinlist @symname"
template="name=X1"}
V {}
S {}
E {}
L 4 70 -280 70 -190 {}
L 4 70 -190 140 -190 {}
L 4 140 -280 140 -190 {}
L 4 70 -280 140 -280 {}
B 5 67.5 -262.5 72.5 -257.5 {name=VDD
dir=inout}
B 5 67.5 -212.5 72.5 -207.5 {name=Vin
dir=in}
B 5 137.5 -262.5 142.5 -257.5 {name=Voutfinal
dir=out}
B 5 137.5 -212.5 142.5 -207.5 {name=Voutinverted
dir=out}
T {@name} 70 -295 0 0 0.2 0.2 {}
Also, are the schematics with the inductors available? I’d like to get LVS to pass with the inductors.
a
@Mitch Bailey, I just uploaded the PA.sch which has the inductors. I also updated the rldo.sym, rldo.sch, and rldo.spice that has the GND pin.
m
Thanks, just to be clear, the symbols missing the GND pin that I see are
Liza_Tgate
,
Liza_enable
, and
pseudo
The one of the inductors in PA looks like it’s missing the vccd2 connection. LNA layout looks like it has 3 inductors. Is there a schematic that has the inductors?
SSCS-22-7-PA.png
a
@Mitch Bailey, thank you for all the checks. It really helped us go through the precheck. We have gotten it down to XOR and ZeroArea errors only. The XOR errors are 6 (5 in Metal3 and 1 in AreaID). I was trying to access the generated xor.gds file on Open Galaxy, but could not figure it out. Is there a way I can download or access those gds files? It would really help us finish before the deadline. Thanks in advance!
m
The output gds results should be in an
outputs
directory, but I’m not sure how to get that from Open Galaxy.
m
Hi @Mitch Bailey, our gds file is size 48 MB after compressing in gzip. We also used
make compress
but we can't bring down the size less than 25 MB. Is there any other way to bring it down less than 25MB ?
m
Is there a problem with being over 25MB?
make compress
will automatically split files over 100MB. Maybe you could modify your Makefile to split files over 25MB.
a
Yes, Github won't allow us to upload files more than 25 MB.
m
Are you sure it’s not just a warning?
a
@Mitch Bailey it says this and removes the file to be uploaded:
m
I’ve never tried to upload to github with the gui. I don’t know if this will work, but in your
caravel_user_project
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make uncompress
sed -i.bak 's/FILE_SIZE_LIMIT_MB = 100/FILE_SIZE_LIMIT_MB = 25/' caravel/Makefile
make compress
This should make several files in your gds directory with
split
in the name. Try uploading those.