open-source-silicon.dev

Hello <@U017UPJEGKZ>. You laid out very wide metal tracks on your DC-DC converter, right? Did you encounter any kind of post-tapeout DRC errors because of maximum width rules?
I have to lay out ground planes for my RF submissions and they should be as wide as possible to reduce parasitic inductance.

As far as I know there is no maximum metal width rule. However, there is a maximum metal density rule. And its checked in a 700um grid. There is a script to check it as part of the submission process and you can run the script yourslef

I am pretty sure my design fails some of the maximum metal density rules, I guess there were not being checked at that point?

Thanks for the feedback. Do you know how to check for density? I confess that I'm quite lost regarding how to do it

I tagged you in the thread where I was dealing with this. I dont really remember all the steps, but that thread should have all the info.