Yes I did the same modification like this:
(
sky130_fd_sc_hd__tt_025C_1v80.lib)
…
voltage_map(“VNB”,
0.0000000000)
voltage_map(“VPB”,
1.8000000000);
…
pg_pin (“VNB”) {
pg_type : “pwell”;
physical_connection : “device_layer”;
voltage_name : “VNB”;
}
pg_pin (“VPB”) {
pg_type : “nwell”;
physical_connection : “device_layer”;
voltage_name : “VPB”;
….
but seems doesn’t fix the problem(?), here is the warnings:
connect(1): no such node Tile_X1Y1_LUT4AB/Inst_LUT4AB_switch_matrix/_2307_/VGND
connect(1): no such node Tile_X1Y1_LUT4AB/Inst_LUT4AB_switch_matrix/_2307_/VNB
…
WARNING: missing bias (6) /Tile_X1Y2_LUT4AB/Inst_LUT4AB_switch_matrix/_2347_/VNB at (sky130_fd_sc_hd__a32o_4)/MMNA0
WARNING: missing bias (6) /Tile_X1Y2_LUT4AB/Inst_LUT4AB_switch_matrix/_2347_/VPB at (sky130_fd_sc_hd__a32o_4)/MMPA0
…
So, I’m not sure whether the tool recognize those power/bias pins and do the mapping/routing for them?