open-source-silicon.dev

<@U016EM8L91B> Is there a way to programmatically add `isosub` to layout imported from GDS? Calibre allows you to add layers to individual cells in the rule file, but that's not possible in magic, is it? I'm trying to avoid having to recreate the gds with the `isosub` layer. i was thinking that if the `mag` files were around, one could relatively easily add the `isosub` layers there, but it looks like the extraction script for gds doesn't use/keep `mag` files.

The problem is that `isosub` is a non-physical layer that depends on whether the designer wants a specific area of substrate to be treated separately or not.  In short, the GDS of the I/O pads _ought_ to have the isosub layer because by definition it can't pass LVS otherwise.  So the proper solution is to fix the GDS.

<@U017X0NM2E7>:  Also note that there is at least one place in the GPIOv2 cell where a cell layout has multiple transistors, and in the cell above it in the hierarchy, there is a deep nwell that covers some but not all of those transistors.  Consequently, it is impossible for the extractor to know, when extracting the cell that is lower in the hierarchy, that some portion of the substrate is going to be in a deep nwell and another portion isn't.  Resolving that requires more targeted flattening of subcells on input.  The I/O cells are just chock full of awful design practices.