@User Does the following line in a magic

ext

file indicate a problem with substrate extraction or is this the default no connection state?

substrate "VSUBS" 0 0 -1073741817 -1073741817 space 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

The default is no connection state. Most CMOS processes will start with a p-doped wafer, and so the absence of any mask layers is the p-substrate. In magic that would be the built-in type "space". It is possible to insist that the designer draw both n-well and p-well everywhere, but it's not representative of the actual silicon. So I coded the extraction so that "space" is effectively the substrate, and will be extracted as such unless it is blocked by something like nwell, or isosub.