Is there a tutorial somewhere showing generation o...
# openram
m
Is there a tutorial somewhere showing generation of a RAM and then usage in a simple design, followed by hardening with OpenLANE suitable for the google shuttle?
o
This was our original plan for the subservient SoC, to create a FuseSoC generator for OpenRAM and use it in our design. After speaking to @Matthew Guthaus it seems that there is a fair amount of compute time needed to create a macro and there might be issues with some parameter combinations so that it's better to use the precompiled macros for now
I have created a core description file for them already so that they can be used in simulation. You can check it out here https://github.com/olofk/subservient/
But @Klas Nordmark who has done most work on the implementation says there seems to be some issue with the new macros in combination with Caravel so we're going with dffram for now until we understand what's going wrong.
k
Yep, known issue with PDN generation currently. It would be really nice if we got it working before the submission deadline though, it's a bit messy without a memory compiler... Had to reduce clock speed significantly to get a build
o
Good at least that the issue has been confirmed. Do you know if there's any way to follow the progress?
k
Not really, I only know that Guthaus said that he was working on it when I asked last week, and no patches since then from what I can see
m
I have some progress here: https://github.com/mattvenn/sky130_sram
latest sky130 sram repo has been updated and openlane can route it. Fails with a mountain of DRC issues as discussed in another thread
m
Hi @Matt Venn, please where I can find this repo: "latest sky130 sram repo" ?
would you please send the link?
m
m
@Matthew Guthaus thank you, but sorry I'm still confused, I'm searching for the memory cells that include the(6T, sense amp. & the D-FF) that are mapped to sky130 tech. , else how can I map to a certain technology, would you please explain to my a bit or give me an example?
m
Those are completed memory designs including the cells
m
And if I want to customize one with differen dimensions?
m
You can send it to me. We are still debugging some sizes and doing additional verification. It isn't quite automatic yet
Simulation above 4kb is too show until Xyce support for sky130 works