Hi! Has anyone run into this error message `[WARNI...
# sky130
Hi! Has anyone run into this error message
[WARNING STA-0328] port 'DIODE' not found.
when using
pdk? I suspect this error is blocking me at
in openlane. (The design finishes the flow in
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Detailed error message:
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[INFO]: Changing layout from /openLANE_flow/designs/phy_prbs/runs/clk_2p4_hs_16/tmp/placement/15-resizer_timing.def to /openLANE_flow/designs/phy_prbs/runs/clk_2p4_hs_16/tmp/routing/18-fastroute.def
[INFO]: Changing layout from 0 to /openLANE_flow/designs/phy_prbs/runs/clk_2p4_hs_16/tmp/routing/18-fastroute.guide
child process exited abnormally
    while executing
"exec grep "#Antenna violations:" [index_file $::env(fastroute_log_file_tag).log 0] -s | tail -1 | sed -r "s/.*\[^0-9\]//""
    (procedure "global_routing_fastroute" line 16)
    invoked from within
    (procedure "global_routing" line 10)
    invoked from within
    (procedure "run_routing" line 27)
    invoked from within
    (procedure "run_non_interactive_mode" line 19)
    invoked from within
"run_non_interactive_mode {*}$argv"
    invoked from within
"if { [info exists flags_map(-interactive)] || [info exists flags_map(-it)] } {
	puts_info "Running interactively"
	if { [info exists arg_values(-file)..."
    (file "./flow.tcl" line 223)
The lines where
#Antenna violations:
is missing:
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[INFO GRT-0018] Total wirelength: 7344 um
[WARNING STA-0328] port 'DIODE' not found.
[INFO GRT-0014] Num routed nets: 199
Probably best to ask this on the #openlane channel, although @Manar Abdelatty might know the answer to it. Note that the
library has not been used nearly as much as
, so I don't know if it has all the additions that were made for
. The "DIODE" port is the single output from the diode cell
. Just scanning through some files, I think it's significant that the diode cell does not appear in the liberty files, which are what is used by the STA tool (which is what is producing the error message).
More to the point, the diode cell is in the liberty library for
but not for
Assuming that's the issue, you can probably work around it by copying the diode cell entry from the
liberty file into the
liberty file, change the name, and it likely will work.
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Ah thanks a lot for the help and detailed suggestion! I am gonna go ahead and try the workaround. If it doesn’t work out, I will go ask around in the openlane channel.
BTW, if that does work, I probably want to try to make a custom patch for it in open_pdks, and also check what other standard cell libraries might be missing the liberty file view of the diode cell.
Unfortunately it didn’t work… I got a lot of warnings regarding templates in the liberty file from early steps, which I didn’t see before copying the diode cell over. The flow did finish, but I don’t think it generated anything.
Ugh, looks like they have different table names in the different standard cell sets, which greatly complicates things.
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