I have basic doubt. I have designed opamp with ga...
# analog-designd
Deepak
12/22/2021, 10:45 AMI have basic doubt. I have designed opamp with gain ~60db and Bandwidth 10MHz.I have used Miller capacitance of 400fF in opamp.
Now I have used this opamp for non inverting amplifier . The ouput seems to be continuously increasing in case of input as pulse or sinewave. What can be possible reason for such output?
Deepak
12/22/2021, 10:47 AMHow can I check if any capacitive effect is creating such output?
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Luis Henrique Rodovalho
12/22/2021, 10:53 AMSee how the inner nodes are behaving. Maybe it is unstable. Try a smaller time step, if possible.
Luis Henrique Rodovalho
12/22/2021, 10:54 AMDoes its input range include ground? You should have another supply voltage for a virtual ground at half VDD (0.9 V)
Luis Henrique Rodovalho
12/22/2021, 10:58 AMAnother solution is to have a VDD at 0.9 V and a VSS at -0.9 V. If your amp topology isn't rail-to-rail IO, it won't work at all. Even then, some amp topologies can have input over the rails, but the output can't.
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ArunAshok
12/22/2021, 11:13 AMIts clearly shows a capacaitor charging for every positive cycle. Could you share the circuit of the Opamp please
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Deepak
12/22/2021, 11:24 AM@User it includes Miller capacitance inside. I think that should not be affecting the output.
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Luis Henrique Rodovalho
12/22/2021, 11:26 AMSee, it uses a NMOS differential pair. It won't work with inputs at GND.
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Deepak
12/22/2021, 11:27 AMOkay, so instead of ground, I should use negative supply... Right?
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Luis Henrique Rodovalho
12/22/2021, 11:34 AMYes. But you must remember that for those transistors your maximum VDS and VGS is 1.8 V. You can't use 1.8 V and -1.8 V.
Luis Henrique Rodovalho
12/22/2021, 11:38 AMAlso, you have a 10 kOhm resistor in the feedback loop. A 1 V voltage drop and you have 100 uA. I'm afraid it this amp won't have full output range. Try larger resistors later.
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ArunAshok
12/22/2021, 2:10 PMIn another words, you should bias the opamp inputs with a dc voltage so that those transistors are in saturation and provide gain. And you AC will be riding on the top of this bias voltage. The minimum of this AC voltage should be greater than the sum of Vt + Vov (m5) + Vov(M1) where Vov = Vgs- Vt
ArunAshok
12/22/2021, 2:12 PMFirst step is to check all the transistors are in saturation with DCsim and then proceed to transient sim. It should work as you intend