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<@U017X0NM2E7> Look like my pre-check LVS run look...
# lvs
d
@Mitch Bailey Look like my pre-check LVS run looks to be hanging due to SRAM. Is there is any specific update need lvs config file?. I have attached the lvs config file. Appreciate any suggestion here 🙏
lvs_config.jsonlvs_config.sram.json
m
Hey @Dinesh A, Looks like the 
lvs_config.sram.json
file has both the spice file and the rtl verilog included. Maybe the rtl verilog is causing problems. Could you try removing it? The job is stuck in netgen, not magic, right?
d
Yes It's netgen, I am running local tapeout precheck LVS. With deleting SRAM verilog file also i see LVS run is hanging, Any one able pass efabless pre-checks with SRAM model ?
m
Is this the openRAM macro or the new proprietary SRAM?
d
This is with openRAM macro
m
My OpenRAM setup passes, but it’s PDK dependent. There was a recent update to the pdk (and magic extract rules) changed the extraction types for some of the devices (due to switching to combined models). If you look at the extraction log, you can see the tech file version. I think the local precheck uses 1.0.470. The sram spice files have not been updated to match this yet. Can you try using the attached file where the model names have been modified?
Sorry, having problems uploading files…
d
In LVS_check log, i see a warning WARNING: Tech files do not match: /opt/pdk_mpw11/sky130A/libs.tech/magic/sky130A.tech: version 1.0.439-0-g1341f54 /home/dinesha/workarea/efabless/mpw_precheck/checks/be_checks//tech/sky130A/sky130A.tech: version 1.0.446-0-gdd7771c
m
Ok, it may be due to a tech file difference or it may be that the spice files for the sram are missing mods to pass lvs. Are there sram spice files in 
$PRECHECK_ROOT/checks/be_checks/spice
? Are they different than the files in the pdk? If they are, can you try changing the 
lvs_config.json
file to point to those?
d
I have updated PDK, now it's shows as 1.0.466-0-gbdc9412 vs 1.0.446-0-gdd7771c WARNING: Tech files do not match: /opt/pdk_mpw11/sky130A/libs.tech/magic/sky130A.tech: version 1.0.466-0-gbdc9412 /home/dinesha/workarea/efabless/mpw_precheck/checks/be_checks//tech/sky130A/sky130A.tech: version 1.0.446-0-gdd7771c Results may be incorrect. Contact efabless to update the soft connection rules.
m
Yes, unfortunately it does that even though they appear to match. Here there seems to be some issue with the repo commit, but I don’t think it’s a major issue. Is LVS sill failing? Is the sram spice in the pdk the same as the spice here 
$PRECHECK_ROOT/checks/be_checks/spice
? If not, try pointing to 
$LVS_ROOT/spice/<macro-spice>
in the 
lvs_config.sram.json
file.
d
LVS looks to be hanging, I see couple of SRAM mismatch in LVS log -------------------------------------------------------------------------------------------- Contents of circuit 1: Circuit: 'sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec' Circuit sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec contains 2 device instances. Class: sky130_fd_bd_sram__openram_dp_nand3_dec instances: 1 Class: sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec instances: 1 Circuit contains 8 nets. Contents of circuit 2: Circuit: 'sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec' Circuit sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec contains 2 device instances. Class: sky130_fd_bd_sram__openram_dp_nand3_dec instances: 1 Class: sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec instances: 1 Circuit contains 9 nets. Circuit 1 contains 2 devices, Circuit 2 contains 2 devices. Circuit 1 contains 8 nets, Circuit 2 contains 9 nets. * MISMATCH * Flattening non-matched subcircuits sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec Flattening instances of sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec in file /home/dinesha/workarea/opencore/git/bigendian/openframe_riscduino_dcore_gen2/precheck_results/24_MAY_2024___02_02_36/tmp/ext/openframe_project_wrapper.gds.nowell.spice Flattening instances of sky130_sram_2kbyte_1rw1r_32x512_8_and3_dec in file /home/dinesha/workarea/opencore/git/bigendian/openframe_riscduino_dcore_gen2/precheck_results/24_MAY_2024___02_02_36/tmp/nowell.ext/openframe_project_wrapper.gds.nowell.spice Contents of circuit 1: Circuit: 'sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec' Circuit sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec contains 2 device instances. Class: sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec instances: 1 Class: sky130_fd_bd_sram__openram_dp_nand2_dec instances: 1 Circuit contains 7 nets. Contents of circuit 2: Circuit: 'sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec' Circuit sky130_sram_2kbyte_1rw1r_32x512_8_and2_dec contains 2 device instances. Class: sky130_sram_2kbyte_1rw1r_32x512_8_pinv_dec instances: 1 Class: sky130_fd_bd_sram__openram_dp_nand2_dec instances: 1 Circuit contains 8 nets. Circuit 1 contains 2 devices, Circuit 2 contains 2 devices. Circuit 1 contains 7 nets, Circuit 2 contains 8 nets. * MISMATCH *
m
Many of the sram sub cells do not match due to unconnected substrate, requiring multiple nets to be connected at a higher level, etc. They should match at the sram block top level though. I can check when I get home in 6-7 hours.
@Dinesh A SRAM macro LVS can take longer than normal. If you’re still seeing errors, can you attach the lvs.report file?
d
m
Looks like the soft connection report is showing a short between power and ground at the sram macro top level.
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Net: vccd1                                                                        |Net: vccd1                                          
  sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3/vdd = 24                            |  sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3/vdd = 24
  sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3/gnd = 24                            |  sky130_sram_2kbyte_1rw1r_32x512_8_pdriver_3/gnd = 24 
  sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1/vdd = 42                               |  sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1/vdd = 42    
  sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1/gnd = 42                               |  sky130_sram_2kbyte_1rw1r_32x512_8_pinv_1/gnd = 42 
  sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17/vdd = 540                             |  sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17/vdd = 540
  sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17/gnd = 540                             |  sky130_sram_2kbyte_1rw1r_32x512_8_pinv_17/gnd = 540                  
  sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1/vdd = 24                              |  sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1/vdd = 24                   
  sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1/gnd = 24                              |  sky130_sram_2kbyte_1rw1r_32x512_8_pand2_1/gnd = 24             
  sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1/vdd = 12                             |  sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1/vdd = 12            
  sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1/gnd = 12                             |  sky130_sram_2kbyte_1rw1r_32x512_8_pnand2_1/gnd = 12
On the sram soft connection check, the non-nwell connection shows source/drain pfet connections
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(no matching net)                                                                 |Net: sky130_sram_2kbyte_1rw1r_32x512_8_bank_0/s_en0                               
                                                                                  |  sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0/Z = 1                                
                                                                                  |  sky130_fd_pr__pfet_01v8/(1|3) = 32
                                                                                  |                                                                                 
(no matching net)                                                                 |Net: sky130_sram_2kbyte_1rw1r_32x512_8_bank_0/s_en1
                                                                                  |  sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0/Z = 1                                
                                                                                  |  sky130_fd_pr__pfet_01v8/(1|3) = 32
while the well/psubstrate connection extraction shows nfet and pfet gate connections
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Net: sky130_sram_2kbyte_1rw1r_32x512_8_bank_0/s_en0                               |(no matching net)
  sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0/Z = 1                                 |
  sky130_fd_pr__nfet_01v8/2 = 32                                                  |
  sky130_fd_pr__pfet_01v8/2 = 64                                                  |
                                                                                  |
Net: sky130_sram_2kbyte_1rw1r_32x512_8_bank_0/s_en1                               |(no matching net)
  sky130_sram_2kbyte_1rw1r_32x512_8_pand3_0/Z = 1                                 |
  sky130_fd_pr__nfet_01v8/2 = 32                                                  |
  sky130_fd_pr__pfet_01v8/2 = 64                                                  |
This seems to indicate that there is a problem with the extraction.
The soft report has this error
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ubcircuit pins:
Circuit 1: sky130_fd_bd_sram__openram_sense_amp                                   |Circuit 2: sky130_fd_bd_sram__openram_sense_amp
----------------------------------------------------------------------------------|----------------------------------------------------------------------------------
BL                                                                                |BL
BR                                                                                |BR                             
VDD_uq0                                                                           |VDD_uq0                  
EN                                                                                |EN                         
VDD                                                                               |VDD
GND                                                                               |GND
GND_uq0                                                                           |(no matching pin)                                        
DOUT                                                                              |DOUT                                                                              
---------------------------------------------------------------------------------------------------------------------------------------------------------------------
Port number 8 greater than number of ports 7                                      
Port number 8 greater than number of ports 7                                      
Port number 8 greater than number of ports 7
Port number 8 greater than number of ports 7
This means that the subcircuit flattening routine is not giving the expected result. I think this is a fatal bug and should never happen. Anytime you see this, I suggest flatglobbing the cell (and any subcells) in the 
lvs_config.json
file.
d
@Mitch Bailey Sorry, I am not clear on option to solve this issue ..
m
@Dinesh A I was looking over some of the old sram LVS logs that I have and do not see this issue. It might have something to do with a magic or netgen version. Let me look into it some more.
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