Hi All, I am facing a very weird issue. I am desig...
# analog-design
n
Hi All, I am facing a very weird issue. I am design a circuit to charge a capacitor (with switch). During simulation in xschem, The circuit is working as expected during simulation in xschem including the monte carlo simulation with temperature variation. During the post layout simulation, the circuit fails to work for
tt
corner in
combined
models. It works properly if the
mismatch (tt_mm or mc_mm) and temperature variation
is included in the simulation. Moreover, if the
combined models are changed to ngspice models,
results are ok for tt corner as well. I am using
g5v0d10v5
nfet and pfet (w = 39 and l = 0.5 ) as switches. Is there anything I am missing with combined models or is it my layout issue only? Please see the attached pex netlist. @Tim Edwards Can you please have a look at this issue? EDIT : I just saw that all the dummy transistors have parameters
as=0 and ps=0
in the extracted netlist. Can that be an issue?
t
I have not had time to respond to this today, but I wanted to let you know that I have seen the post and I will look into it. Thanks for the detailed report!
👍 1
n
Ok. 🙂
Hi @Tim Edwards, I found something... There are 2 - 8 mega ohm resistors in design
(sky130_fd_pr__res_xhigh_po_0p35 series structure)
While running simulation, ngspice is treating some connections of resistors as singular matrix (open) which they are not (LVS is clean). Moreover, in different simulation it points to different location in resistor.
t
There is a known issue where ngspice is failing to compute the expression for the res_high and res_xhigh resistors for a long chain of resistors. The resistor models from the original model set have different equations for the resistance. I didn't have any trouble just hooking up a power supply and simulating a transient. What does your testbench look like?
n
Sorry I don't access to my computer for weekend. But here is the description... C_EXT pin has a capacitor of 0.2uf connected to ground. And SHOCK_CAP has a capacitor of 10uf connected to ground. Output is at pin SHOCK_CAP. The transient simulation is run for 0.9 second. The POR circuit charges C_EXT, which triggers the comparator and as the comparator output goes high, the PMOS switch is turned off and 2Mega ohm resistor comes in series with 2kom. In tt corner the SHOCK_Cap Has an initial voltage of 1.1V across it which makes it charge to 6.1 V (VDD = 5V). But this is happening only for combined model tt corner.
t
@naina singhal: I think I will need a testbench to debug the issue. I tried making a testbench based on your description but it is not producing any meaningful result.
BTW, the zero area and perimeter dummy FET sources should not impact the simulation, but it is something I have not noticed before and probably want to investigate.
n
Hi @Tim Edwards. I will send you the test bench on Monday. Sorry for the delay. And yes I changed the 0 parameters to the value they should be ... still the result was same. Thank you so much for your help.
Hi @Tim Edwards Please find the attached test bench. The SHOCK_CAP (external 10uF) has to charge to 5V through a resistor of 2k ohm and then a PMOS transistor will connect a series resistance of 2 MOhm with it (2kohm resistor and 10uF capacitor). But in tt (combined models) simulation, the capacitor has a initial voltage of 1.1 V across it which should not be there in any scenario. I did update the layout now and same error keep appearing in one of the 100 MC simulations. It is very random in nature as far as I can tell and I guess it is coming from ngspice simulation.
t
@naina singhal: You claimed that it does not work for
tt
corner in
combined
, but your testbench is a Monte Carlo simulation using the
mc
corner.
n
@Tim Edwards Sorry for mistake. Please find the attached test bench for tt corner.