Hello everyone. Let me confirm openlane with caravel. (1)In some case, hold violation still remain in final data even if eda tools are excellent. To repair them, I tried ECO flow written in https://armleo-openlane.readthedocs.io/en/latest/docs/source/eco_flow.html. I added "ECO_ENABLE" : 1 to config.json and type "make user_project_wrapper". But ECO flow didn't start and final data still has hold violation. How can I use ECO flow? (2)In some case, netlist modification by hand is necessary, for example, to fix max slew/cap violation. After modification, I need to restart signoff flow with new GDS. ↓ HP said that openlane can restart intended flow. https://armleo-openlane.readthedocs.io/en/latest/docs/source/advanced_readme.html How can I use it openlane with caravel? Do I need to add some parameter to Makefile? (3)If I update GDS by hand, is netlist in signoff also update?

is following configuration correct?

"CLOCK_PORT": "wb_clk_i",
    "CLOCK_NET": "wb_clk.i",

What error are you facing during synthesis?

"RUN_LINTER": 0,
    "QUIT_ON_SYNTH_CHECKS": 0,

it is not safe to skip above step. It may lead to chip failure. Make sure to fix synthesis errors

Hi Vijayan, Thank you for your reply.

>increase the hold margin to fix the violations.

>Variable references

Yes. I agree with you. But I worry the case that hold violation happens even if those variables is used. I have many experience that case happened. (Sorry I forgot to write the premise.)

-0.06 is small value. It can be fixed easily