Hi All, I have a question regarding the maximum size of

nfet g5v0d10d5

. What is the maximum width or number of fingers (multiplier) of the I can use? During simulation, I have not find any limit regarding the maximum size of the transistor. I am trying to put a driver with maximum possible driving current in my design. Is there any current specification of pins on QFN package?

https://github.com/google/skywater-pdk-libs-sky130_fd_pr/blob/f62031a1be9aefe902d6[…]7436/cells/nfet_g5v0d10v5/sky130_fd_pr__nfet_g5v0d10v5.bins.csv See this file with the mosfet bins for simulation. Try to use those values. You can use as many fingers as you wish. There won't be a problem with the layout. You just need to make sure there are taps to substrate as close as possible of the active regions.

Thank you so much for answer @Luis Henrique Rodovalho

There is also a limit of 15um from any diffusion to the nearest well or substrate tap (latchup rule). That limits the size of any device or array of devices to 30um x 30um including a guard ring surrounding the array on all sides.

@Tim Edwards So I can put as many multipliers as I want as long as the single device size (with full guard ring) is equal to or below 30ux30u? Is that correct?

Within a generated device, the values for M (indicating number of ranks of devices) and NF are for devices arrayed inside a single area surrounded by a guard ring. If you want to exceed the size that would prevent some area in the middle of the array from being less than 15um from the guard ring, then split it into multiple generated devices.

Ok And there is no upper limit on M other than area?

No.