Hi, I'm new around here. I started using iic-osic-tools and I'm in doubt on how to configure OpenLane, could someone help me?

Is there a way to specify multiple clocks with their own max frequencies in openlane? So it would generate 2 clock trees and be able to do sta on both clock domains?

So I've seen Yosys "kGE" (kilo gate equivalent) listed for area on a few projects. How does this compare to the gate count in the OpenLane Skywater 130nm std-cell gate count?

I am running an AC analysis of a two-stage amplifier in unity gain feedback. The input has 0.9V DC and 1mV AC. I am trying to plot the voltages and the gain in dB with db() function. But it seems that the db() function always give positive value... As shown on the plot above. The output voltage vo (6.05e-05) is below vi (0.001), but the gain, which is db(v(vo)/v(vi)) is +24.37dB. Am I missing something really simple?

Hi, I'm trying to make fancy testbench template in xschem, using multiple control blocks that can be ignored (spice_ignore=1) and each one with at least one plot display that should be empty if the associated control block is ignored. I'm using

set curplotname

to give each simulation a unique name. The "store data" logic is working as expected. My problem happens in the moment of loading the data. - The

xschem raw_read

function used in the launcher.sym is not capable of load all plots in the .raw. So I have to create specific launchers for each .control block, and indicate which plot load. Is there a way to just load everything? - In the same track of multiple

launcher.sym

logic, It's possible to use a custom symbol property as value inside other symbol property? In the launcher I have

descr="tcleval(@@target)"

but it doesn't read the

target

property. - Each time that a

launcher

is run, it overwrites the other plots. Is there a way to avoid this? - I want each graph to show variables from a specific

.control

block. I've seen this

dataset

concept that is similar to the

plot

used in ngspice. Is there a way to use the plot name instead of the dataset index to indicate a graph which set of vectors use? I want to reduce to a minimum the manual configuration per simulation. Only setting curplotname and indicate which plotname use for each graph should be required.

Is it possible to speed up analog sims in ngspice? I mean, in particular, I believe the first part takes quite long because it fetches the

.lib /usr/local/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt

However in my case I have a relatively small circuit which only uses two types of devices, sky130_fd_pr__nfet_01v8 and sky130_fd_pr__pfet_01v8, so I wonder is it possible to get it to fetch only those devices used in the circuit? Even telling it somehow. That would speed things up a lot, in particular for quick iteration (optimization) over a circuit. Otherwise every time I make a small change on the circuit the sim takes a few minutes to run, which is quite impractical. I'm pretty sure somebody has encountered this issue before. Is there a way to do this, to speed up the simulation cycle speed? Thanks

Hi everyone, I am working on the layout with sky130 pdk, and I want the allowed current density for each metal line interconnect for my design. I tried searching the documentation but couldn't get any information on this. Can anyone help me with this information, or how I can calculate it theoretically? @Stefan Schippers @mehdi

@User I am trying Synopsys tools for an open-source FPGA IP generation based on the skywater PDK. Currently, I am blocked by the technology file. If you can share your experience, it will help a lot. Thanks!

How to rectify ' volare: command not found'?

I'm trying to generate SDF to use in simulation but am having problems. In the Parallax SDF documentation, write_sdf has several options : write_sdf [-corner corner_name] [-divider /|.] [-include_typ] [-digits digits] [-gzip] [-no_timestamp] [-no_version] filename The command for write_sdf is or_sta.tcl in which is called by routing.tcl in OpenLane scripts; however, when I try and add the option, '-include_typ', the command fails. I want to include the typical value in the SDF file so that Icarus Verilog sdf_annotate command will work properly.