Is it possible to speed up analog sims in ngspice? I mean, in particular, I believe the first part takes quite long because it fetches the

.lib /usr/local/share/pdk/sky130A/libs.tech/ngspice/sky130.lib.spice tt

However in my case I have a relatively small circuit which only uses two types of devices, sky130_fd_pr__nfet_01v8 and sky130_fd_pr__pfet_01v8, so I wonder is it possible to get it to fetch only those devices used in the circuit? Even telling it somehow. That would speed things up a lot, in particular for quick iteration (optimization) over a circuit. Otherwise every time I make a small change on the circuit the sim takes a few minutes to run, which is quite impractical. I'm pretty sure somebody has encountered this issue before. Is there a way to do this, to speed up the simulation cycle speed? Thanks

Hi, Can Klayout be used for analog layout in place of Magic ? I find Magic bit uncomfortable to use.

Hello all, I'm a beginner in using XSchem and NGspice and I was facing some troubles in simulating my first circuit which is a track and hold circuit. After I create the netlist successfully and try to simulate it I get a whole bunch of errors that I don't know the reasons behind them. I'll attach the circuit, the script for the clock voltage source, the ngspice commands and the errors window. If anyone can help me, I'll be very thankful.

Hi, I am new to efabless tape out process and the use of open source tools. I have designed a two stage opamp to understand the design and tape out process for analog circuits. While running precheck locally, the GPIO-Defines check is failing. I have edited the user_defines.v file as suggested but the error is still present. Please see the attached user_define.v file and precheck log. Moreover, the precheck is not running LVS. The caravel was initially installed for digital designs (MPW8) with user_project_wrapper but I cloned an user_analog_project_wrapper and followed the steps with the old CARAVEL_ROOT path. Is that creating the issue? Please help me with the issue.

Should I be concerned about these ngspice warnings? I think I always get them if I use a transistor.

option SCALE: Scale is set to 1e-06 for instance and model parameters
Warning: Model issue on line 2610 :
  .model sky130_fd_pr__model__parasitic__diode_ps2nw d level=3.0 tlevc=1.0 ...
unrecognized parameter (vb) - ignored
unrecognized parameter (gap1) - ignored
unrecognized parameter (gap2) - ignored
unrecognized parameter (xw) - ignored

Is there a way to install open_pdks sky130 with just the spice files? Or should I just be cloning sky130_fd_pr directly if I don't care about the rest of the stuff? IIRC open_pdks has some patches to the spice files (which are hopefully being upstreamed?)

Hello, everybody. I'm currently designing a operational amplifier, and I'm using cascode miller compensation. The open loop simulation results show a 4 MHz GBW and 69° phase margin. However, for a voltage follower configuration, when I run a transient simulation for a step input signal, I'm seeing ringing. Why? The github repo is at https://github.com/lhrodovalho/sky130_rodovalho_ip__lpopamp/ and the testbenches are in the xschem folder.

Hi All, I am trying to design an ESD protection circuit since I am planning to use 11 analog pins in caravan wrapper which has no ESD protection. I tried simulating the available diode model diode_pw2nd_05v5 using the combined models. I changed the device name from D to XD. After simulation, I am getting a forward voltage of around

1.78V

required to turn on the diode (image is attached). Is that result correct or am I doing something wrong? Moreover, I can not find any ESD specific devices other than some nfet and there as well I can not find any difference in layout. Can anyone please help with what devices to use and how to simulate it properly. I also tried simulating

test_esd

circuit provide by @Stephen Schippers. I simulation is not running properly. Can anyone please help me with the issue?

Warning: PDK_ROOT env. var. not found or empty, trying to find an open_pdks install No open_pdks installation found, set PDK_ROOT env. var. and restart xschem setup_tcp_bespice: success : listening to TCP port: 2022

I am running an AC analysis of a two-stage amplifier in unity gain feedback. The input has 0.9V DC and 1mV AC. I am trying to plot the voltages and the gain in dB with db() function. But it seems that the db() function always give positive value... As shown on the plot above. The output voltage vo (6.05e-05) is below vi (0.001), but the gain, which is db(v(vo)/v(vi)) is +24.37dB. Am I missing something really simple?