Currently I'm designing inverter-based amplifiers, but I need extended nwells to pass DRC. It is not area efficient, so I must overlap subcells

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@Tim Edwards One question, Fig 1 is my inverter focused only on verifying all DRCs, so the n-well is as large as required to satisfy the 0.18 um with respect to diffusions. You mentioned that the actual layers may extend beyond the abutment box to satisfy the overlap. My question is, how big should I draw the n-well so that when doing p&r I am sure that the tool will create continuity in the n-wells? Is Fig. 1 ok or should I fill in the empty space as in Fig. 3? I have measured in sky130 hd std cells the n-well outside the abutment box [Fig 2], are those extent dimensions mandatory?

The idea may be that designers (especially mixed-signal designers) may use a handful of digital cells outside of a P&R environment, so having the cell clean by itself is useful. By contrast, I/O cells are often not DRC clean by themselves, because they would never be used outside of the context of a full padframe.