Slot-036 of mpw4 is missing a lot of inputs to

user_proj_example

. There may be a problem with the top rtl.

user_proj_example mprj (
`ifdef USE_POWER_PINS
        .vccd1(vccd1),  // User area 1 1.8V power
        .vssd1(vssd1), // User area 1 digital ground
`endif

    .wb_clk_i(wb_clk_i),
    .wb_rst_i(wb_rst_i),

    // MGMT SoC Wishbone Slave


    .wbs_stb_i(wbs_stb_i),

    .wbs_dat_o(wbs_dat_o),

    // Logic Analyzer

    // IO Pads

    // IRQ

);

user_proj_example

has many more inputs defined and these all appear to be floating (

_NC*

). Here's the gl

user_proj_example mprj (.vccd1(vccd1),
    .vssd1(vssd1),
    .wb_clk_i(wb_clk_i),
    .wb_rst_i(wb_rst_i),
    .wbs_stb_i(wbs_stb_i),
    .io_in({_NC1,
...
    _NC38}),
    .io_oeb({_NC39,
...
    .io_out({_NC77,
...
    _NC114}),
    .irq({_NC115,
    _NC116,
    _NC117}),
    .la_data_in({_NC118,
...
    _NC245}),
    .la_data_out({_NC246,
...
    _NC373}),
    .la_oenb({_NC374,
...
    _NC501}),
    .wbs_adr_i({_NC502,
...
    _NC533}),
    .wbs_dat_i({_NC534,
...
    _NC565}),
...
    .wbs_sel_i({_NC566,
    _NC567,
    _NC568,
    _NC569}));