< U01KX5D1KDF> for a first try you should try this <https gi open-source-silicon.dev #fpga

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<@U01KX5D1KDF> for a first try, you should try thi...

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Rob Taylor

04/09/2021, 10:40 AM

@User for a first try, you should try this: https://github.com/m-labs/VexRiscv-verilog/blob/master/VexRiscv_Lite.v