@User @User Mohamed's current run shows 26mm^2 as the area immediately after synthesis. This means the layout area will be somewhere between 50-70 mm^2. So, trimming down the core and the memories is a necessity. Moving to OpenRAM/DFFRAM for the reduced SRAM block is needed as well. I believe more than 50% of the 2M cells belong to the memories (SRAM and Caches). The conclusion, we need to do what does it take to bring the area reported by yosys below 6-7mm^2.