<#206 Extract of SC layout from .mag needs MAGIC_E...
# open_pdks
g
#206 Extract of SC layout from .mag needs MAGIC_EXT_USE_GDS=1 New issue created by hpretl When I extract the netlist from a
.mag
layout block which has been generated in SKY130 using
OpenLane
, and I use
netgen
to compare it to the powered Verilog netlist, then it fails by default due to the filler cells. When I set
export MAGIC_EXT_USE_GDS=1
, then it works and the LVS passes. Question: Why is this not the default behavior, and maybe the switch should be renamed to reflect the issue that not only an extract in
magic
after GDS read-in but also when starting from the
.mag
file needs this switch? The relevant code lives in
setup.tcl
in `$PDK_ROOT/sky130A/libs.tech/netgen`:
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if { [info exist ::env(MAGIC_EXT_USE_GDS)] && $::env(MAGIC_EXT_USE_GDS) } {
    foreach cell $cells1 {
        if {[regexp {sky130_fd_sc_[^_]+__fill_[[:digit:]]+} $cell match]} {
            ignore class "-circuit1 $cell"
        }
        if {[regexp {sky130_fd_sc_[^_]+__tapvpwrvgnd_[[:digit:]]+} $cell match]} {
            ignore class "-circuit1 $cell"
        }
        if {[regexp {sky130_ef_sc_[^_]+__fakediode_[[:digit:]]+} $cell match]} {
            ignore class "-circuit1 $cell"
        }
    }
For the extract in
magic
I use the procedure below, perhaps in an SC layout I should not extract the standard cells? However, in this way I can also extract a mixed analog/digital design.
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extract all
ext2spice lvs
ext2spice -o <file.spice>
RTimothyEdwards/open_pdks