Tim Edwards
10/12/2023, 12:03 AM4141980 gf180mcuA
218944 gf180mcuB
258400 gf180mcuC
141864 gf180mcuD
12727296 sky130A
337312 sky130B
(above: du -s
run on my installed /usr/share/pdk
. The base 'A' variant sizes are much larger because I install all essential libraries plus a number of optional ones.)Tim Edwards
10/12/2023, 12:05 AMvolare
is meant to have self-contained PDKs, though; with volare, you can install and uninstall individual PDKs, so they probably have to be installed the way they are, or if you remove the base variant, then all of the symbolic links would break.Mitch Bailey
10/12/2023, 3:44 AMTim Edwards
10/12/2023, 10:39 PMGitHub
10/16/2023, 12:51 AMmake user_proj_example
with open_pdks version dd7771c384ed36b91a25e9f8b314355fc26561be
fails with
[INFO]: Running Synthesis (log: ../home/user/gf180mcu/mpw-1/caravel_user_project/openlane/user_proj_example/runs/23_10_15_17_33/logs/synthesis/1-synthesis.log)...
[ERROR]: during executing yosys script /openlane/scripts/yosys/synth.tcl
[ERROR]: Log: ../home/user/gf180mcu/mpw-1/caravel_user_project/openlane/user_proj_example/runs/23_10_15_17_33/logs/synthesis/1-synthesis.log
[ERROR]: Last 10 lines:
ERROR: TCL interpreter returned an error: can't read "::env(SYNTH_CAP_LOAD)": no such variable
child process exited abnormally
Running find $PDK_ROOT/$PDK/libs.tech -type f -exec grep SYNTH_CAP_LOAD {} /dev/null \;
returns nothing, but when set to the sky130 pdk, you can see that each standard cell library has a definition.
$PDK_ROOT/sky130A/libs.tech/openlane/sky130_fd_sc_hd/config.tcl:set ::env(SYNTH_CAP_LOAD) "33.442" ; # femtofarad __inv_16 pin A cap (<https://github.com/google/skywater-pdk-libs-sky130_fd_sc_hd/blob/main/cells/inv/sky130_fd_sc_hd__inv_16__tt_025C_1v80.lib.json>)
$PDK_ROOT/sky130A/libs.tech/openlane/sky130_fd_sc_ms/config.tcl:set ::env(SYNTH_CAP_LOAD) "22.66" ; # femtofarad _inv_8 pin A cap
$PDK_ROOT/sky130A/libs.tech/openlane/sky130_fd_sc_hvl/config.tcl:set ::env(SYNTH_CAP_LOAD) "70.77" ; # femtofarad __inv_16 pin A cap (<https://github.com/google/skywater-pdk-libs-sky130_fd_sc_hvl/blob/main/cells/inv/sky130_fd_sc_hvl__inv_16__tt_025C_3v30.lib.json>)
$PDK_ROOT/sky130A/libs.tech/openlane/sky130_osu_sc_t18/config.tcl:set ::env(SYNTH_CAP_LOAD) "37.357" ; # femtofarad INVX8 pin A cap
$PDK_ROOT/sky130A/libs.tech/openlane/sky130_fd_sc_hs/config.tcl:set ::env(SYNTH_CAP_LOAD) "43.39" ; # femtofarad _inv_16 pin A cap (<https://github.com/google/skywater-pdk-libs-sky130_fd_sc_hs/blob/main/cells/inv/sky130_fd_sc_hs__inv_16__tt_025C_1v68.lib.json>)
$PDK_ROOT/sky130A/libs.tech/openlane/sky130_fd_sc_ls/config.tcl:set ::env(SYNTH_CAP_LOAD) "46.690" ; # femtofarad _inv_16 pin A cap (<https://github.com/google/skywater-pdk-libs-sky130_fd_sc_ls/blob/main/cells/inv/sky130_fd_sc_ls__inv_16__tt_100C_1v80.lib.json>)
$PDK_ROOT/sky130A/libs.tech/openlane/sky130_fd_sc_hdll/config.tcl:set ::env(SYNTH_CAP_LOAD) "33.468" ; # femtofarad _inv_16 pin A cap (<https://github.com/google/skywater-pdk-libs-sky130_fd_sc_hdll/blob/main/cells/inv/sky130_fd_sc_hdll__inv_16__tt_025C_1v80.lib.json>)
RTimothyEdwards/open_pdksGitHub
10/17/2023, 7:00 AM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/6bf520c6cb96a40bb3d5285dcab17663f690f91a|6bf520c6>
- Corrected the GF tech file, which attempted to assign labels on
RTimothyEdwards/open_pdksGitHub
10/17/2023, 3:43 PMopen_pdks
. If sky130_fd_sc_hd.v
is read into Icarus Verilog without specifying a top module, it throws errors due to missing modules.
This PR removes the base instances from sky130_ef_sc_hd__fakediode_2
and sky130_ef_sc_hd__fill_12
and unifies some of the formatting. The standard cell libraries were built and read with iverilog, which is now happy:
iverilog primitives.v sky130_fd_sc_hd.v
RTimothyEdwards/open_pdks
GitHub Actions: Run (all)
GitHub Actions: Run (sky130_fd_sc_hvl)
GitHub Actions: Run (sky130_fd_sc_ls)
GitHub Actions: Run (sky130_fd_sc_ms)
GitHub Actions: Run (sky130_fd_sc_hs)
GitHub Actions: Run (sky130_fd_sc_hdll)
GitHub Actions: Run (sky130_fd_sc_hd)
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10/18/2023, 7:00 AM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/310ef1c39e30bfb2dca7770197ed34284a39cf37|310ef1c3>
- Remove base instances from custom cells
<https://github.com/RTimothyEdwards/open_pdks/commit/4f5c1995d629acef895c81bf07c2ba13213d195c|4f5c1995>
- Updated version to go along with the merge of pull request #408
RTimothyEdwards/open_pdksGitHub
10/24/2023, 11:05 AMpoly_resistors_L=10um▾
GitHub
10/24/2023, 7:37 PM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/559a117b163cef2f920f33f30f6f690aa0b47e4c|559a117b>
- Multiple changes to multiple PDKs:
RTimothyEdwards/open_pdksGitHub
10/26/2023, 7:00 AM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/326f64003eaef0c26956508edd22c4f2003e4338|326f6400>
- Added initial support in magic for 16V devices (LDNMOS and LDPMOS).
<https://github.com/RTimothyEdwards/open_pdks/commit/392b92efc2a0be83c1381e739abaf48cc6135c7e|392b92ef>
- Completed the first full implementation of the LDNMOS and LDPMOS
RTimothyEdwards/open_pdksGitHub
10/26/2023, 11:21 AMrun.tcl
). The other reads the PDK cells LEF files run2.tcl
). Both produce DRC errors All nwells must contain metal-connected N+ taps (nwell.4)
. I am trying to understand if this is expected in abstract views in the standards cells.
RTimothyEdwards/open_pdksGitHub
10/27/2023, 7:00 AM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/6e1fcaf572a5ebc99c0683a69c1b7e0691918999|6e1fcaf5>
- Updated references (again) to capture the new commit hash of the
<https://github.com/RTimothyEdwards/open_pdks/commit/69af8420a9013059f10ecdf96e5fbc886fbdacba|69af8420>
- Corrected the resistor device names in the IRSIM parameter
RTimothyEdwards/open_pdksGitHub
10/28/2023, 7:00 AM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/e0f692f46654d6c7c99fc70a0c94a080dab53571|e0f692f4>
- (Re-)corrected the MiM capacitor model names extracted by magic,
RTimothyEdwards/open_pdksGitHub
10/29/2023, 1:54 PMGitHub
10/31/2023, 12:07 AM$PDK.magicrc
files currently have
puts stdout "Sourcing design .magicrc for technology sky130A ..."
Which is not actually true.
Would something like this be possible?
puts stdout "Sourcing design [info script] for technology sky130A ..."
RTimothyEdwards/open_pdksGitHub
11/01/2023, 10:43 PMSITE
definition
• Are improperly(?) marked CLASS BLOCK
instead of CLASS CORE
as normal standard cells are
MACRO sky130_ef_sc_hd__decap_12
CLASS BLOCK ;
FOREIGN sky130_ef_sc_hd__decap_12 ;
ORIGIN 0.000 0.000 ;
SIZE 5.520 BY 2.720 ;
PIN VGND
…
2. All double-height cells in at least fd_sc_hd
• Have their sites declared as unithd
instead of the correct unithddbl
, e.g.
MACRO sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1
CLASS CORE WELLTAP ;
FOREIGN sky130_fd_sc_hd__lpflow_lsbuf_lh_hl_isowell_tap_1 ;
ORIGIN 0.000 0.000 ;
SIZE 6.440 BY 5.440 ;
SYMMETRY X Y R90 ;
SITE unithd ;
…
When manually instantiated, those double-height cells will fail with the message "taller than any row" in OpenROAD for example, unless OpenROAD is instructed to explicitly construct double-height rows to accommodate them.RTimothyEdwards/open_pdks
GitHub
11/02/2023, 8:36 AMCLASS
property to CLASS CORE SPACER
instead of CLASS BLOCK
• Set missing SYMMETRY
property to X Y R90
to match fd_sc_hd
fill cells
• Set missing SITE
property to unithd
• Created missing sky130_ef_sc_hd__fill_4.v
• Remove `fakediode`: Maintaining it is no longer worth it
* * *
Resolves (1) of #413
RTimothyEdwards/open_pdks
GitHub Actions: Run (all)
GitHub Actions: Run (sky130_fd_sc_hvl)
GitHub Actions: Run (sky130_fd_sc_ls)
GitHub Actions: Run (sky130_fd_sc_ms)
GitHub Actions: Run (sky130_fd_sc_hs)
GitHub Actions: Run (sky130_fd_sc_hdll)
GitHub Actions: Run (sky130_fd_sc_hd)
✅ No checks have passed
0/7 successful checksGitHub
11/03/2023, 7:00 AM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/20a97d854debbd43e11046d31e75caedbf1eb706|20a97d85>
- Fix LEF
views of EF cells
<https://github.com/RTimothyEdwards/open_pdks/commit/2a38e86d557197f06d3eefca0fbc161db9e09924|2a38e86d>
- Updated version to go along with the merge of pull request #414
RTimothyEdwards/open_pdksGitHub
11/07/2023, 6:00 AMimage▾
Abhinav Uppal
11/08/2023, 6:52 PMGitHub
11/10/2023, 10:58 PMDownloading 7-track standard cell library from ../sources/gf180mcu_fd_sc_mcu7t5v0
Cloning <https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0> to ../sources/gf180mcu_fd_sc_mcu7t5v0
Cloning into '../sources/gf180mcu_fd_sc_mcu7t5v0'...
fatal: unable to access '<https://github.com/efabless/globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0/>':
Failed to connect to <http://github.com|github.com> port 443 after 135991 ms: Couldn't connect to server
Cloning into '../sources/gf180mcu_fd_sc_mcu7t5v0'...
remote: Enumerating objects: 10041, done.
remote: Counting objects: 100% (10041/10041), done.
remote: Compressing objects: 100% (4729/4729), done.
remote: Total 10041 (delta 6196), reused 8959 (delta 5311), pack-reused 0
Receiving objects: 100% (10041/10041), 120.23 MiB | 23.38 MiB/s, done.
RTimothyEdwards/open_pdksGitHub
11/11/2023, 8:00 AM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/39f9029011b7d3e5edfd5409f1c5733ece4fc5b9|39f90290>
- Make repo downloads more persistent
<https://github.com/RTimothyEdwards/open_pdks/commit/32e8f233b8b920bddfd4c4850c62371283c3e570|32e8f233>
- Updated version to go along with pull request #416 from Cristian
RTimothyEdwards/open_pdksHarald Pretl
11/11/2023, 12:09 PMaquiles viza
11/14/2023, 2:00 PMvolare
is a bit unstable right now. Is not allowing see available commits nor downloading a specific one.
$ volare ls-remote --pdk gf180mcu
Encountered an error when polling version list: 403 Client Error: rate limit exceeded for url: <https://api.github.com/repos/efabless/volare/releases?per_page=100>
$ volare enable --pdk gf180mcu dd7771c384ed36b91a25e9f8b314355fc26561be
Version dd7771c384ed36b91a25e9f8b314355fc26561be not found locally, attempting to download…
Failed to obtain dd7771c384ed36b91a25e9f8b314355fc26561be remotely: <Response [403]>.
It's just me or this affects everyone?GitHub
11/21/2023, 3:29 PMGitHub
11/22/2023, 8:00 AM<https://github.com/RTimothyEdwards/open_pdks/tree/master|master>
by RTimothyEdwards
<https://github.com/RTimothyEdwards/open_pdks/commit/01f0e51ec98d3bbb3a0565fd9d73bc414d2fcda2|01f0e51e>
- Add MAX_CAPACITANCE_CONSTRAINT
to OpenLane configs
<https://github.com/RTimothyEdwards/open_pdks/commit/8c68aca265b7de9491c8369d9d96d5106220ded1|8c68aca2>
- Updated version to go along with the merge of pull request #417
RTimothyEdwards/open_pdksGitHub
11/25/2023, 9:52 AM3da499bf3cb58e44aa0f2360a672c7187994a08b
, a metal3 resistor was added to separate VSSIO
and VDDIO
nets in sky130_ef_io__vccd_lvc_clamped3_pad.mag
and sky130_ef_io__vssd_lvc_clamped3_pad.mag
.
I can't find the corresponding change in the gds data at $PDK_ROOT/$PDK/libs.ref/sky130_fd_io/gds/sky130_ef_io.gds
for volare pdk versions after that. The tapeout data for 2311
does not contain metal3 resistors in those cells.
This causes an mismatch in all LVS checks that includes chip_io
and its variants.
RTimothyEdwards/open_pdksGitHub
11/28/2023, 5:03 PMSashank Krishna S
11/28/2023, 9:28 PM