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Mitch Bailey

02/23/2021, 1:46 PM
@User I'm attempting to run device level LVS on the caravel chip_io block. caravel
origin/develop commit 384a7d517a82c49a0c4411c8132ce3f97eebfad5
Using magic 8.3.123 Here's a sample of the extracted netlist. The ports are strange and not connected to any instances.
.subckt sky130_fd_io__hvc_clampv2 sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCD
+ sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_A VSUBS sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSA
+ sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSWITCH sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSD
+ m3_99_0# sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDA
+ sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VCCHIB
+ sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VSSIO_Q sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/AMUXBUS_B
+ sky130_fd_io__com_busses_esd_0/sky130_fd_io__com_bus_hookup_0/VDDIO_Q w_1040_5785#
+ m2_5179_0#
Xsky130_fd_pr__nfet_01v8__example_55959141808670_0 VSUBS w_1040_5785# a_3156_9348#
+ w_1040_5785# a_3156_9348# a_3156_9348# a_3156_9348# a_3156_9348# w_1040_5785# a_3156_9348#
+ a_3156_9348# w_1040_5785# a_3156_9348# a_3156_9348# w_1040_5785# w_1040_5785# w_1040_5785#
+ w_1040_5785# a_3156_9348# a_3156_9348# a_3156_9348# w_1040_5785# a_3156_9348# a_3156_9348#
+ a_3156_9348# a_3156_9348# a_3156_9348# a_3156_9348# sky130_fd_pr__nfet_01v8__example_55959141808670
To recreate the netlist, go to
caravel/openlane
and run
gunzip ../gds/chip_io.gds.gz
flow.tcl -design chip_io -tag ext -lvs -net ../verilog/gl/chip_io.v -gds ../gds/chip_io.gds
The extracted netlist will be in
chip_io/runs/ext/results/magic/chip_io.gds.spice
Also having trouble extracting DFFRAM. Here's the top cell.
.subckt DFFRAM A[0] A[1] A[2] A[3] A[4] A[5] A[6] A[7] CLK Di[0] Di[10] Di[11] Di[12]
+ Di[13] Di[14] Di[15] Di[16] Di[17] Di[18] Di[19] Di[1] Di[20] Di[21] Di[22] Di[23]
+ Di[24] Di[25] Di[26] Di[27] Di[28] Di[29] Di[2] Di[30] Di[31] Di[3] Di[4] Di[5]
+ Di[6] Di[7] Di[8] Di[9] Do[0] Do[10] Do[11] Do[12] Do[13] Do[14] Do[15] Do[16] Do[17]
+ Do[18] Do[19] Do[1] Do[20] Do[21] Do[22] Do[23] Do[24] Do[25] Do[26] Do[27] Do[28]
+ Do[29] Do[2] Do[30] Do[31] Do[3] Do[4] Do[5] Do[6] Do[7] Do[8] Do[9] EN WE[0] WE[1]
+ WE[2] WE[3] VPWR VGND
XCOLUMN\[0\].RAMCOLS/B_0_1/WORD\[21\].W/B0/BIT\[3\].OBUF COLUMN\[0\].RAMCOLS/B_0_1/WORD\[21\].W/B0/BIT\[3\].OBUF/Z
+ COLUMN\[0\].RAMCOLS/B_0_1/WORD\[21\].W/B0/BIT\[3\].OBUF/A COLUMN\[0\].RAMCOLS/B_0_1/WORD\[21\].W/B0/BIT\[3\].OBUF/TE_B
+ COLUMN\[0\].RAMCOLS/B_0_1/WORD\[21\].W/B0/BIT\[3\].OBUF/VNB COLUMN\[0\].RAMCOLS/B_0_1/WORD\[21\].W/B0/BIT\[3\].OBUF/VPB
+ COLUMN\[0\].RAMCOLS/B_0_1/WORD\[21\].W/B0/BIT\[3\].OBUF/VGND COLUMN\[0\].RAMCOLS/B_0_1/WORD\[21\].W/B0/BIT\[3\].OBUF/VPWR
+ sky130_fd_sc_hd__ebufn_2
XCOLUMN\[0\].RAMCOLS/B_0_0/WORD\[23\].W/B0/BIT\[0\].FF COLUMN\[0\].RAMCOLS/B_0_0/WORD\[23\].W/B0/BIT\[0\].FF/VPB
+ COLUMN\[0\].RAMCOLS/B_0_0/WORD\[23\].W/B0/BIT\[0\].FF/VNB COLUMN\[0\].RAMCOLS/B_0_0/WORD\[23\].W/B0/BIT\[0\].FF/Q
+ COLUMN\[0\].RAMCOLS/B_0_0/WORD\[23\].W/B0/BIT\[0\].FF/CLK COLUMN\[0\].RAMCOLS/B_0_0/WORD\[23\].W/B0/BIT\[0\].FF/D
+ COLUMN\[0\].RAMCOLS/B_0_0/WORD\[23\].W/B0/BIT\[0\].FF/VPWR COLUMN\[0\].RAMCOLS/B_0_0/WORD\[23\].W/B0/BIT\[0\].FF/VGND
+ sky130_fd_sc_hd__dfxtp_1
You can see that the power is all unconnected. I was getting close to clean LVS runs on DFFRAM back in December.