Tim Edwards

02/23/2021, 1:56 PM
@User: Running LVS on anything related to the I/O cells extracted from magic is at this point essentially impossible. It's one of a number of things I'm working on at the moment. Magic cannot read in the GDS of the I/O cells in any meaningful way. I have a few tricks to flatten various parts of them that helps. It gets pretty close, actually. I'm still having some issues with device types "short" in the schematic-derived netlists that are extracted as metal resistors from magic; my intention is to resolve this by "correcting" the schematic-derived netlists; I do not like the generic "short" type. Then there are some issues related to grounds being connected together through the substrate; there are substrate cut layers defined in GDS and I can probably come up with some way to handle them properly in magic.