<@U016EM8L91B> <@U016HSALFAN> While I'm waiting fo...
# verification-be
m
@User @User While I'm waiting for the release of the
chip_io
cells, I'm trying device level LVS and CVC on the shuttle chips (
user_project_wrapper
only). I'll log issues with programs to the respective program github and design problems to the respective design github. I'm having trouble extracting some designs because magic exceeds my 12GB memory limit. If someone could run the extraction and send me the
*.gds.spice
file, I could proceed from there. For example,
Caravel_Plus
or
caravel-softshell
. Is that possible/helpful?