Matthew Guthaus
12/03/2020, 12:58 AM.SUBCKT sky130_fd_bd_sram__openram_dp_cell BL0 BR0 BL1 BR1 WL0 WL1 VDD GND ** N=11 EP=8 IP=0 FDC=16 *.SEEDPROM * Bitcell Core X0 Q WL1 BL1 GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.15 X1 GND Q_bar Q GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.15 X2 GND Q_bar Q GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.15 X3 BL0 WL0 Q GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.15 X4 Q_bar WL1 BR1 GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.15 X5 GND Q Q_bar GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.15 X6 GND Q Q_bar GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.15 X7 BR0 WL0 Q_bar GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.15 X8 VDD Q Q_bar VDD sky130_fd_pr__special_pfet_latch W=0.14 L=0.15 X9 Q Q_bar VDD VDD sky130_fd_pr__special_pfet_latch W=0.14 L=0.15 * drainOnly PMOS * M10 Q_bar WL1 Q_bar VDD sky130_fd_pr__special_pfet_latch L=0.08 W=0.14 * M11 Q WL0 Q VDD sky130_fd_pr__special_pfet_latch L=0.08 W=0.14 * drainOnly NMOS X12 BL1 GND BL1 GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.08 X14 BR1 GND BR1 GND sky130_fd_pr__special_nfet_latch W=0.21 L=0.08 .ENDS