Hi All, I'm at the stage where I can integrate my ...
# caravel
j
Hi All, I'm at the stage where I can integrate my design onto the project wrapper but I have some questions regarding options to test the chip. The circuit has to be powered by a trapezoidal wave and I am wondering if the Caravel (cpu/chip?) can provide that? If it doesn't, what options do I have to achieve that externally? Another question is how are the input signals from the Caravel chip provided to the user's project and what way I can probe or read the inputs and outputs? Does all input and output signals from the user's project must go through the caravel chip or it could be isolated and probed? Thank you.
t
The user area supplies are independent of the management area supplies, so as long as you can generate the trapezoidal signal you need off-chip, you can power up your user project any way you like. To get signals to and from your project, you can use either the "logic analyzer" interface, which provides 128 full-duplex bits, and you can route signals to any of the 38 GPIO pins for off-chip access. Direct probing is not possible on an Open-MPW run due to the bump bonding process on top of the chip. ChipIgnite designs can add probe windows, but these will not be accessible in the QFN parts returned to you, and you will have to arrange for wirebonding of some of the additional bare dies returned to you in an open-cavity package, or use a probe card.