@Tim Edwards Are

nmoscaps

realized as poly over n-tap inside nwell ? or just as nmos (may be with some additional Vth adjusting implant)? Trying to figure out how

pmoscaps

are realized. From @Tom picture above (specifically the arrow) it seems that nmoscaps are implemented as nmos, possibly with a Vth correction.

The GF180MCU documentation shows devices with a

_b

suffix that are the "true" varactors (poly over n-tap, and also poly over p-tap, which is not usually a characterized device). The ones without the suffix appear to be basic source-drain-tied FETs. But there is a separate device model for the source-drain-tied devices, which is why they have a separate device name. I'm not sure why a MOScap with a standard FET structure would need a distinct simulation model. So the MOScap FET devices are:

cap_nmos_03v3

,

cap_pmos_03v3

,

cap_nmos_06v0

, and

cap_pmos_06v0

, while the varactor devices are

cap_nmos_03v3_b

,

cap_pmos_03v3_b

,

cap_nmos_06v0_b

, and

cap_pmos_06v0_b

. (Then, to make life more complicated, there's the extended low-doped drain devices vs. the extended salicide-blocked drain devices. . .)

Looks like the moscap models are used to speed up spice sims. Inside the subckt definitions, ‘C’ is based on W*L of the transistor, and a Cox factor. It doesn’t simulate a mosfet.