open-source-silicon.dev

I'm using the had board only to power the chip via the USB connector J1 and with both the 1V8 and 3V3 jumpers set to the pin 1 side to use the local regulators.

In this configuration without doing anything on my PC using the USB only as a power source do all the GPIOs around the user portion of the die come up tri-stated? This is what i want since I'm only interested in the analog connections.

Ignore the question - looks like a disastrous oversight on my part in the rush to tapeout, I forgot to tie off the enables of the block which use the regular GPIOs. not all lost thenkfully

image.png

False alarm! I was looking at the wrong IO pins. It seems to work well so far! <@U016EM8L91B> where can I find a mepping between the internal analog caravel wrapper pin connections and the ones on the PCB shown in the attached picture?

<@U01H2JMLFLL>:  The best mapping can be found in the `caravel_user_project_analog` repository in this file:   <https://github.com/efabless/caravel_user_project_analog/blob/main/verilog/rtl/user_analog_proj_example.v>