<@U016EM8L91B> <@U016HSAA3RQ> Do we have any proce...
# mpw-2-silicond
Dinesh A
01/29/2023, 9:34 AM@Tim Edwards @jeffdi Do we have any process data on which corner these chip are manufactured - Best(FF)/Worst(SS)/Typical(TT) ? OR It's mix-up ?
t
Tim Edwards
01/29/2023, 3:09 PMShuttle runs should always be pretty close to typical.
a
Andrew Wright
01/30/2023, 3:08 PMTo clarify the material was not intentionally skewed in any direction from nominal. The bugs we are seeing are consistent with silicon close to typical.
Andrew Wright
01/30/2023, 3:11 PMThat assertion is based on previously comparing the post layout extracted timing results we used to improve the design for later MPW runs. Obviously there is on wafer and between wafer variation anyway.
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