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<@U018LA3KZCJ> <@U0268926L04> With latest Openlane...
# openroad
d
@Matt Liberty @Vijayan Krishnan With latest Openlane tool set i am facing Magic DRC failure through the flow But Global Routing DRC is clean. Is there is known issue in the flow ---------------------------------------- Min area of metal1 holes > 0.14um^2 (met1.7) ---------------------------------------- 175.695um 265.440um 175.880um 265.595um 142.115um 221.920um 142.300um 222.075um 183.975um 205.600um 184.160um 205.755um 91.055um 33.605um 91.240um 33.760um 219.395um 1081.440um 219.580um 1081.595um 193.635um 1418.720um 193.820um 1418.875um 207.435um 1364.320um 207.620um 1364.475um 211.575um 1339.205um 211.760um 1339.360um 225.835um 1266.400um 226.020um 1266.555um 207.895um 1817.925um 208.080um 1818.080um 203.755um 1766.880um 203.940um 1767.035um ---------------------------------------- [INFO]: COUNT: 11 [INFO]: Should be divided by 3 or 4 Openlane Version detail
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python3 ./env.py issue-survey
Kernel: Linux v5.13.0-52-generic
Distribution: ubuntu 20.04
Python: v3.8.10 (OK)
Container Engine: docker v20.10.17 (OK)
OpenLane Git Version: f9b5781f5ef0bbdf39ab1c2bbd78be8db11b27f2
pip: INSTALLED
pip:venv: INSTALLED
---
PDK Version Verification Status: OK
---
Git Log (Last 3 Commits)

f9b5781 2022-07-01T16:04:31+02:00 Fix a bug with `-overwrite` (#1171) - Anton Blanchard -  (HEAD -> master, origin/master, origin/HEAD)
abb9d59 2022-07-01T13:46:02+02:00 Reimplement support for multiple power domains (#1175) - Marwan Abbas -  ()
83b6145 2022-06-26T18:19:11+02:00 Fix #1163 (#1164) - Mohamed Gaber -  ()
v
can you share the test case generated under 
runs
directory?
its belong to which design? can you share repo link?
d
I am facing issue in Repo: https://github.com/dineshannayya/riscduino_qcore and macro : make ycr4_iconnect
I don't see any test case directory under run directory I see flow fails with below Error Message
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[INFO]: Running Magic DRC...
[INFO]: Converting Magic DRC Violations to Magic Readable Format...
[INFO]: Converting Magic DRC Violations to Klayout XML Database...
[ERROR]: There are violations in the design after Magic DRC.
[ERROR]: Total Number of violations is 11
[INFO]: Saving current set of views in 'ycr4_iconnect/runs/ycr4_iconnect/results/final'...
[INFO]: Generating final set of reports...
[INFO]: Created manufacturability report at 'ycr4_iconnect/runs/ycr4_iconnect/reports/manufacturability.rpt'.
[INFO]: Created metrics report at 'ycr4_iconnect/runs/ycr4_iconnect/reports/metrics.csv'.
[INFO]: Saving runtime environment...
[ERROR]: Flow failed.

    while executing
"flow_fail"
    (procedure "quit_on_magic_drc" line 13)
    invoked from within
"quit_on_magic_drc -log $::env(drc_prefix).tr"
    (procedure "run_magic_drc" line 26)
    invoked from within
"run_magic_drc"
    (procedure "run_drc_step" line 9)
    invoked from within
"[lindex $step_exe 0] [lindex $step_exe 1] "
    (procedure "run_non_interactive_mode" line 57)
    invoked from within
"run_non_interactive_mode {*}$argv"
    invoked from within
"if { [info exists flags_map(-interactive)] || [info exists flags_map(-it)] } {
    if { [info exists arg_values(-file)] } {
        run_file [file nor..."
    (file "/openlane/flow.tcl" line 389)
make: *** [Makefile:44: ycr4_iconnect] Error 1
v
@Dinesh A I am not able to pass global routing stage, with updated repo
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[ERROR GRT-0118] Routing congestion too high.
Error: resizer_routing_timing.tcl, 53 GRT-0118
child process exited abnormally
@Dinesh A Is timing met post cts in your flow?
d
Did you updated the repo ? I see similar issue report Mar time line : https://github.com/RTimothyEdwards/open_pdks/issues/236
v
yes using latest commits
d
Do you have the latest PDK ? My PDK shows these version
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total 12
drwxr-xr-x 3 dinesha pyfive 4096 Jul 21 14:09 volare
lrwxrwxrwx 1 dinesha pyfive   71 Jul 21 14:11 sky130B -> volare/sky130/versions/41c0908b47130d5675ff8484255b43f66463a7d6/sky130B
lrwxrwxrwx 1 dinesha pyfive   71 Jul 21 14:11 sky130A -> volare/sky130/versions/41c0908b47130d5675ff8484255b43f66463a7d6/sky130A
v
I think MPW7 using sky130B
can you try once with sky130A?
its an open-pdks issue they mentioned in discussion.
d
Flow Passes with MPW-6 Tool set with set ::env(CELL_PAD) "2"
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Kernel: Linux v5.13.0-52-generic
Distribution: ubuntu 20.04
Python: v3.8.10 (OK)
Container Engine: docker v20.10.17 (OK)
OpenLane Git Version: 0dc6fb79c91082b94f8ded78d70f8bacbab96bf2
pip: INSTALLED
pip:venv: INSTALLED
---
PDK Version Verification Status: OK
---
Git Log (Last 3 Commits)

0dc6fb7 2022-05-17T08:24:25-07:00 Enable PL_ROUTABILITY_DRIVEN and PL_TIME_DRIVEN (#1092) - Anton Blanchard -  (HEAD -> master, tag: 2022.05.18_02.12.32, origin/master, origin/HEAD)
fba1ad0 2022-05-17T14:45:07+02:00 Remove unnecessary calls to `read_verilog` (#1084) - Anton Blanchard -  ()
9d463c0 2022-05-17T14:43:10+02:00 Add `FP_IO_UNMATCHED_ERROR` flag (#1086) - Kareem Farid -  ()
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[STEP 38]
[INFO]: Running OpenROAD Antenna Rule Checker...
[STEP 39]
[INFO]: Running CVC...
[INFO]: Saving final set of views in '/home/dinesha/workarea/opencore/git/riscduino_qcore/openlane/ycr4_iconnect/runs/ycr4_iconnect/results/final'...
[INFO]: Saving final set of views in '/home/dinesha/workarea/opencore/git/riscduino_qcore'...
[INFO]: Saving runtime environment...
[INFO]: Generating final set of reports...
[INFO]: Created manufacturability report at 'ycr4_iconnect/runs/ycr4_iconnect/reports/manufacturability.rpt'.
[INFO]: Created metrics report at 'ycr4_iconnect/runs/ycr4_iconnect/reports/metrics.csv'.
[INFO]: There are no max slew violations in the design at the typical corner.
[INFO]: There are no hold violations in the design at the typical corner.
[WARNING]: There are setup violations in the design at the typical corner. Please refer to 'ycr4_iconnect/runs/ycr4_iconnect/reports/signoff/28-rcx_sta.max.rpt'.
[SUCCESS]: Flow complete.
[INFO]: Note that the following warnings have been generated:
[WARNING]: There are setup violations in the design at the typical corner. Please refer to 'ycr4_iconnect/runs/ycr4_iconnect/reports/signoff/28-rcx_sta.max.rpt'.

mkdir -p ../signoff/ycr4_iconnect/
cp ycr4_iconnect/runs/ycr4_iconnect/OPENLANE_VERSION ../signoff/ycr4_iconnect/
cp ycr4_iconnect/runs/ycr4_iconnect/PDK_SOURCES ../signoff/ycr4_iconnect/
cp ycr4_iconnect/runs/ycr4_iconnect/reports/final_summary_report.csv ../signoff/ycr4_iconnect/
Latest Openlane (MPW7) flow passes With sky130A .. Did you tried with sky130B to reproduce the issue ?
v
in both PDK am facing routing congestion issue, as I am not using custom pin configuration
d
Last time I had congestion issue for same block https://github.com/The-OpenROAD-Project/OpenLane/issues/1106 And it passed with set ::env(CELL_PAD) "2" & GLB_RT_ADJUSTMENT= 0.2
@Tim Edwards I am facing Magic DRC issue with latest Openlane Tool set with PDK set to sky130B and same flow passes with PDK: sky130A I see similar discission on one of the previous discussion on this issue : https://github.com/RTimothyEdwards/open_pdks/issues/236 and there is no closure on the same
t
The issue under discussion in issue #236 was a problem with openlane/openROAD and not with magic. Magic detects minimum metal1 hole areas. If there is a hole in metal1 then it was created by other tools.
d
@Matt Liberty Is there is plan fix this issue in latest Openlane flow
m
I responded to your comments in GH
d
@Tim Edwards Is there is Standard cell Rule set difference between Sky130A and Sky130B PDK library?
t
@Dinesh A: There is a different rule set for OpenRCX, since the metal stackup is different and the metal parasitics change. Likewise, the standard cell technology LEF files have different values for the metal layer parasitics. Those are the only differences between A and B that affect the Openlane flow. I do not expect much difference in delays due to parasitics between A and B, but the possibility does exist that a project synthesized to A and manufactured in B might fail due to timing issues (and vice versa). I think this possibility is a very small one, but it means that any project moved between A and B PDKs should have timing re-checked using the correct target PDK.
@Dinesh A: The sole difference between A and B is that to accommodate ReRAM, the separation of metals 1 and 2 is doubled in B to make room for the ReRAM layer to be placed between them. That raises all metals from 2 to the top by 0.45um (if I recall the dimension correctly); the height of VIA1 is also doubled from 0.45um to 0.9um (so its resistance is doubled).
m
do both have the minarea for holes rule correctly specified?
t
@Matt Liberty: Based on another similar error found recently, I suspect the answer is no. I have a patch from Anton Blanchard for open_pdks that I have not applied yet because I'm still catching up after being in Paris for the FSiC conference. I should get around to applying the patch today, and I will check to make sure that the minimum hole rule is in fact missing from the tech files in B, and that the patch fixes it.
m
In that case I'll consider the issue to be in open_pdks and not OR
t
If that's not the case, then I'll let you know here.
d
@Tim Edwards Thanks for detailed explanation, It means i need to re-harden all my Macro with Sky130B for submitting to MPW7 shuttle. I see MPW-7 Pre-check & Tapeout flow does not fail even through Design harden with Sky130A library. Is this OK?. Ideal solution would be have standard cell library name for SKY130B labeled differently compare to SKY130A. With Moving to Sky130B, I see all my hardmarco generation fails at Magic DRC. Not sure why other MPW-7 teams are not facing this issue ? I feel they are using Sky130A for hardening?
t
@Dinesh A: No, you should not need to re-harden. Just make sure that you run STA under the sky130B PDK and ensure that it still passes. If it does, then the existing design should be good.
d
@Tim Edwards Did you had chance to update patch for open_pdk for this issue ?
m
I'm only seeing this issue with larger designs. My small test designs are all finishing fine
but I've just seen it on a 1000x1000um design
t
@Dinesh A: Yes, I did, and it should be in effect now. However, openlane will need to update its own pointers to the open_pdks version.
d
@Vijayan Krishnan What is process to update latest open_pdk in openlane. When i update the dependencies/tool_metadata.yml and open_pdk section with latest git commit id: 09534f7efecc5f3b2b930e326fd642fc3f7b6199 When I run the make pdk command, It fails with
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[notice] To update, run: python3 -m pip install --upgrade pip
./venv/bin/volare enable
[13:17:05] Found version 09534f7efecc5f3b2b930e326fd642fc3f7b6199 in ./dependencies/tool_metadata.yml.                                                 common.py:131
Version 09534f7efecc5f3b2b930e326fd642fc3f7b6199 not found either locally or remotely.
Version 09534f7efecc5f3b2b930e326fd642fc3f7b6199 not found either locally or remotely.
Try volare build 09534f7efecc5f3b2b930e326fd642fc3f7b6199.
make: *** [Makefile:107: pdk] Error 1
v
goto 
docker
directory and type following:
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make build-open_pdks
make merge
d
it's not working for me
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dinesha@lenovo-i3-10100-07IMB05:~/workarea/efabless/MPW-7/OpenLane/docker$ make build-open_pdks
make: *** No rule to make target 'build-open_pdks'.  Stop.
I see inside Makefile there is command say's no pdk python3 ../dependencies/tool.py --containerized --no-pdks . Due to this open_pdks is not detected by script
v
d
My Make pdk run also fails after some stages inside caravel_user_projects
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../common/staging_install.py -std_format \
	-source /opt/pdk_mpw7/open_pdks/sky130/sky130A \
	-finalpath /opt/pdk_mpw7/sky130A \
	-variable PDKPATH \
	-link_from none 2>&1 | tee -a sky130A_install.log
Installing in target directory /opt/pdk_mpw7/sky130A
Removing files from target
Traceback (most recent call last):
  File "../common/staging_install.py", line 432, in <module>
    remove_target(stagingdir, writedir)
  File "../common/staging_install.py", line 153, in remove_target
    slist = os.listdir(stagingdir)
FileNotFoundError: [Errno 2] No such file or directory: '/opt/pdk_mpw7/open_pdks/sky130/sky130A'
make: *** [install-A] Error 1
make[1]: *** [/home/dinesha/workarea/efabless/MPW-7/caravel/Makefile:1276: sky130] Error 2
make[1]: Leaving directory '/home/dinesha/workarea/efabless/MPW-7/caravel_user_project'
make: *** [Makefile:50: pdk] Error 2
I have latest version of caravel_user_project. Looks me like this not volare based pdk install method?
Who will do official openlane release with open_pdks fix ?
v
@jeffdi for caravel flow setup
@Dinesh A For OpenLane flow @donn will do this. But what you trying is caravel flow. Latest OpenLane already have that commit. But for caravel flow you've to manually merge the updates until officially they change to latest tag.
d
@Tim Edwards I tried locally compile the latest open_pdk. I see openlane fails with missing sky130B/libs.ref/sky130_fd_sc_hd/techlef/sky130_fd_sc_hd__nom.tlef I see under folder sky130B/libs.ref/sky130_fd_sc_hd there is no techlef created
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dinesha@lenovo-i3-10100-07IMB05:~/workarea/opencore/git/riscduino_qcore/openlane$ ls -lrt /opt/pdk_mpw7/sky130A/libs.ref/sky130_fd_sc_hd/
total 24
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 verilog
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 spice
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 maglef
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 mag
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 lef
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 gds
Is this expected ? OR it's issue in my local compile I see in older version open_pdk has techlef file
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dinesha@lenovo-i3-10100-07IMB05:~/workarea/efabless/MPW-7/OpenLane$ ls -lrt /opt/pdk_mpw7/sky130A/libs.ref/sky130_fd_sc_hd/
total 84
drwxr-xr-x 2 dinesha pyfive 28672 Jul 27 22:35 maglef
drwxr-xr-x 2 dinesha pyfive  4096 Jul 27 22:35 lef
drwxr-xr-x 2 dinesha pyfive  4096 Jul 27 22:35 lib
drwxr-xr-x 2 dinesha pyfive  4096 Jul 27 22:35 verilog
drwxr-xr-x 2 dinesha pyfive  4096 Jul 27 22:35 techlef
drwxr-xr-x 2 dinesha pyfive  4096 Jul 27 22:35 cdl
drwxr-xr-x 2 dinesha pyfive  4096 Jul 27 22:35 gds
drwxr-xr-x 2 dinesha pyfive  4096 Jul 27 22:35 spice
drwxr-xr-x 2 dinesha pyfive 28672 Jul 27 22:35 mag
t
@Dinesh A: Version of open_pdks?
d
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commit 09534f7efecc5f3b2b930e326fd642fc3f7b6199 (HEAD, tag: 1.0.318, master)
Author: Tim Edwards <tim@opencircuitdesign.com>
Date:   Sat Jul 23 14:01:34 2022 -0400

    Merged pull requests #260 and #262 from Anton Blanchard
@donn When you will be picking the latest open_pdk release and update into openlane flow?. Currently Openlane Sky130B flow is broken due to the Magic DRC failure.
d
I'm waiting on @Tim Edwards to revert some behavior that lead efabless cells to be included in the foundry cell lef. I've already done my testing. All I need is that behavior to be reverted.
@Dinesh A
d
@donn My local pdk build with volare has some missing directory techlef/cdl/lib folder under sky130A/libs.ref/sky130_fd_sc_hd/ & sky130B/libs.ref/sky130_fd_sc_hd/ . Do you see them in your release ?
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inesha@lenovo-i3-10100-07IMB05:/opt/pdk_mpw7$ ls -lrt sky130A/libs.ref/sky130_fd_sc_hd/
total 24
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 verilog
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 spice
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 maglef
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 mag
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 lef
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 gds
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dinesha@lenovo-i3-10100-07IMB05:/opt/pdk_mpw7$ ls -lrt sky130B/libs.ref/sky130_fd_sc_hd/
total 24
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 maglef
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 gds
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 verilog
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 spice
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 mag
drwxr-xr-x 2 dinesha pyfive 4096 Jul 27 22:49 lef
d
magic version mismatch. another instance of "fixed locally, waiting for the revert"
m
@Dinesh A did you find a solution or a way to update the pdk?
d
My local PDK build with latest open_pdk is not working, waiting for official open_pdk update in openlane by @donn
šŸ‘ 1
d
@Dinesh A @MohamedAliYounis @Arman Avetisyan sky130B has been fixed in OpenLane master. Thank you for your patience.
ā¤ļø 1
b
sorry to bother but I got same "Min area of metal1 holes > 0.14um^2 (met1.7)" error on DRC stage during a macro hardening process. I understand that openlane repo is updated and with new pdk update the problem does not occur. So what should be the right way to handle this problem? the openlane setup and pdk repor inside caravel repo build is not updated. Do I need to clone new openlane repo and harden my macro there ? thanks
d
Inside the openlane folder, update the repo & re-compile the pdk 1. git pull or git pull https://github.com/The-OpenROAD-Project/OpenLane 2. make pdk Run your Marco hardening now ..
b
thanks, but can you please clarify: I am using caravel repo with mpw7 tag There is an openlane folder inside this repo, in which there is makefile, user_* folders and folders that I created to harden macros There is also dependencies folder in caravel repo that I need to create according to readme manual, there are openlane_src and pdks folders, in which openlane and pdks is build So, are you talking about caravel repo, or standalone openroad openlane repo? what I think is changing export SKYWATER_COMMIT=f70d8ca46961ff92719d8870a18a076370b85f6cexport OPEN_PDKS_COMMIT?=41c0908b47130d5675ff8484255b43f66463a7d6export OPENLANE_TAG=2022.07.02_01.38.08 in makefile of caravel repo root, and rerun make setup isn't enough? sorry that I can not follow quickly :l
d
Yes, I am taking about standalone openroad openlane repo, You can try your approach it may work ..
m
A quick temporary work around is to force PDK to sky130A.
m
I used the openlane version from mpw7 toolset with the updated version of pdk and it works
āœ… 1
šŸ‘ 1
b
I simply tried what you said, I cloned and build openroad openlane repo, export PDK_ROOT to new pdks folder of the openlane build, use OPENLANE_ROOT as the caravel repo openlane build and it gave error of not matching pdk and openlane [ERROR]: The version of open_pdks used in building the PDK does not match the version OpenLane was tested on (installed: e8294524e5f67c533c5d0c3afa0bcc5b2a5fa066, tested: 41c0908b47130d5675ff8484255b43f66463a7d6) This may introduce some issues. You may want to re-install the PDK by invoking 
make pdk
. [ERROR]: Please update your environment. OpenLane will now quit.
I changed export OPEN_PDKS_COMMIT?=e8294524e5f67c533c5d0c3afa0bcc5b2a5fa066 in makefile but does not solve the problem
I found this check is in dependencies/verify_versions.py I commented out these lines: if commit != manifest_commit: mismatches = True print( f"The version of {name} used in building the PDK does not match the version OpenLane was tested on (installed: {commit}, tested: {manifest_commit})", file=report_file, ) print( "This may introduce some issues. You may want to re-install the PDK by invoking 
make pdk
.", file=report_file, ) now it started running synth :)
m
change "tool_metadata.yml" file with one in the latest openlane commit: https://github.com/The-OpenROAD-Project/OpenLane/blob/master/dependencies/tool_metadata.yml
šŸ‘ 1
b
flow completed with new pdk and caravel's openlane version, but it gave warnings on: [WARNING]: This PDK does not support cvc, skipping... [WARNING]: There are max fanout violations in the design at the typical corner. Please refer to '../home/mbaykenar/Desktop/workspace/mpw7_yonga_soc/openlane/mba_core_region/runs/22_08_03_22_53/reports/signoff/28-rcx_sta.slew.rpt'. I hope they are acceptable :l
v
yes.. @Burak Aykenar no issues
b
thanks a lot, what I did is I cloned latest openlane repo and build it. This automatically build latest PDKs inside OpenLane folder. I export OPENLANE_ROOT as caravel's repo's dependencies/openlane_src and PDK_ROOT as OpenRoad OpenLane's pdk folder, which is OpenLane/pdks I ignored mismatch error by commenting out check functions inside verify_versions.py script. Then the flow worked.
I used sky130B of a newer version openlane in mpw7, harden my macros, then connect them in user_project_wrapper all with a different sky130b than inside the mpw7 repo I pushed final results and now CI is complaining at user_project_flow_sky130A and B in the stage of "Harden Using Openlane" _Error: : The version of open_pdks used in building the PDK does not match the version OpenLane was tested on (installed: e8294524e5f67c533c5d0c3afa0bcc5b2a5fa066, tested: 41c0908b47130d5675ff8484255b43f66463a7d6)_ _35_ This may introduce some issues. You may want to re-install the PDK by invoking 
make pdk
. _36_ Error: : Please update your environment. OpenLane will now quit. I commented out this check in my local repo but CI gives error Possible Solution: finishing the user_project_wrapper flow with repo that mpw7 provided?
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