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<@U016EM8L91B> We have one problem with LVS, where...
# analog-design
k
@Tim Edwards We have one problem with LVS, where we do use hierarchical design and at the level of subsystems (OTA) we have clean LVS however the top level hierarchy reports LVS errors indicating some internal connections of the OTA
@Mitch Bailey
image.png
image.png
Copy code
Net: OTA:1/Vmid                            |(no matching net)
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |
------------------------------------------------------------------------------------
t
@Krzysztof Herman: Can you provide the entire LVS output report? I need to see what those net connections look like in the 2nd netlist.
k
Copy code
Equate elements:  no current cell.
Equate elements:  no current cell.
Equate elements:  no current cell.
Flattening unmatched subcell Tgate in circuit SystemLevel_pre.spice (0)(11 instances)
Flattening unmatched subcell OTA in circuit SystemLevel_pre.spice (0)(5 instances)
Flattening unmatched subcell CurrentMirror in circuit SystemLevel_pre.spice (0)(2 instances)
Flattening unmatched subcell Inverter in circuit SystemLevel_pre.spice (0)(2 instances)
Flattening unmatched subcell VoltageDivider-P in circuit SystemLevel_pre.spice (0)(1 instance)
Flattening unmatched subcell OTA_post in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_APWUPK in circuit SystemLevel.spice (1)(10 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_3ALJPG in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_PF77MM in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_SFAZVM in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_SF5SVM in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_L3YGCM in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_STRFPN in circuit SystemLevel.spice (1)(10 instances)
Flattening unmatched subcell VoltageDivider-P_post in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_U25BZR in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_U25KLQ in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell Tgate_post in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_JMGADZ in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_Z92SJ3 in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_2JG5DZ in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_THKQM4 in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell Inverter_post in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_JMGADZ in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_THKQM4 in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_KP8PNM in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_MHJ2VF in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell CurrentMirror_post in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_UJUP4X in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_U4BYG2 in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_Q4Q8VJ in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_YND74Q in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_8MQB6L in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell M in circuit SystemLevel.spice (1)(6 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_D7AAL5 in circuit SystemLevel.spice (1)(6 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_7PDTEF in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_AFDLP7 in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_VT6YF8 in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_WXTTNJ in circuit SystemLevel.spice (1)(1 instance)

Class SystemLevel_pre.spice (0):  Merged 1 parallel devices.
Class SystemLevel.spice (1):  Merged 265 parallel devices.
Subcircuit summary:
Circuit 1: SystemLevel_pre.spice           |Circuit 2: SystemLevel.spice               
-------------------------------------------|-------------------------------------------
sky130_fd_pr__cap_mim_m3_1 (9)             |sky130_fd_pr__cap_mim_m3_1 (9)             
sky130_fd_pr__nfet_01v8_lvt (80->77)       |sky130_fd_pr__nfet_01v8_lvt (271->77)      
sky130_fd_pr__pfet_01v8_lvt (55)           |sky130_fd_pr__pfet_01v8_lvt (126->55)      
Number of devices: 141                     |Number of devices: 141                     
Number of nets: 106 **Mismatch**           |Number of nets: 105 **Mismatch**           
---------------------------------------------------------------------------------------
NET mismatches: Class fragments follow (with fanout counts):
Circuit 1: SystemLevel_pre.spice           |Circuit 2: SystemLevel.spice               

---------------------------------------------------------------------------------------
Net: Vref_post                             |Net: OTA_post_2/OUT                        
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |                                           
Net: net2                                  |Net: Tgate_post_8/A                        
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 3    
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 3    
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |                                           
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |                                           
                                           |                                           
Net: OTA:1/Vas                             |Net: OTA_post_4/OUT                        
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__nfet_01v8_lvt/2 = 2        |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
                                           |                                           
Net: OTA_sh                                |Net: Tgate_post_7/A                        
  sky130_fd_pr__cap_mim_m3_1/1 = 2         |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 4    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 4    |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
                                           |                                           
Net: Vref_cmp                              |Net: /OTA_post_1/li_1340_1520#             
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 3    |  sky130_fd_pr__nfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 3    |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
                                           |                                           
Net: CMP_out                               |Net: OTA_post_3/IN_M                       
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    
                                           |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |                                           
Net: GND                                   |Net: Tgate_post_4/A                        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/4 = 2        |  sky130_fd_pr__nfet_01v8_lvt/2 = 1        
                                           |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
                                           |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
                                           |                                           
Net: net4                                  |Net: /OTA_post_1/m1_1000_2472#             
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |  sky130_fd_pr__nfet_01v8_lvt/2 = 2        
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
                                           |                                           
Net: VSS                                   |Net: VSS                                   
  sky130_fd_pr__cap_mim_m3_1/2 = 2         |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
  sky130_fd_pr__nfet_01v8_lvt/4 = 75       |  sky130_fd_pr__nfet_01v8_lvt/4 = 77       
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 35   |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 37   
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
                                           |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |                                           
Net: OTA:1/Vmid                            |(no matching net)                          
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |                                           
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |                                           
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |                                           
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |                                           
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: net1                                  |Net: OTA_post_1/IN_M                       
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
---------------------------------------------------------------------------------------
DEVICE mismatches: Class fragments follow (with node fanout counts):
Circuit 1: SystemLevel_pre.spice           |Circuit 2: SystemLevel.spice               

---------------------------------------------------------------------------------------
Instance: sky130_fd_pr__cap_mim_m3_1:C2    |Instance: sky130_fd_pr__cap_mim_m3_1_AFDLP 
  1 = 3                                    |  1 = 118                                  
  2 = 114                                  |  2 = 3                                    
---------------------------------------------------------------------------------------
Netlists do not match.
Netlists do not match.
t
The main thing is that your MiM cap polarity is reversed. There is a definite top and bottom plate, physically, so they have different parasitics to substrate and so can behave differently. That is, there are certainly noise and capacitive coupling considerations to make when deciding which connection goes to which side of the MiM cap, so MiM cap terminals are not considered permutable.
There might be something else going on since the fanout count on one MiM cap terminal is 114 in the layout and 118 in the schematic, but running with the corrected MiM cap polarity should make that error show up more clearly, if it still exists.
k
ok so I should interchange the connections of the compensation capacitance, right?
C2 is an hold capacitor so it is connected to the VSS
t
Yes. Also, it looks like the ground is split in the layout between "VSS" and "GND" where it is just "VSS" in the schematic.
k
could be
ok let me give a try, I was also wondering why the LVS of OTA passes without errors if the problem is the reversely polarized capacitor
t
Note that when analyzing netgen results, when there is a section of non-matching results, the nets (or devices) are in groups, and while netgen tries to match the left and right sides up, there is no guarantee that a net on the left is a match for the net shown directly to its right.
✅ 1
Did you run LVS on the OTA by itself? In the run of netgen above, it is flattened because of a name mismatch ("OTA" vs. "OTA_post") (there is a way in the setup script to force a comparison between cells with different names, overriding the usual behavior).
k
yes I did the LVS at the level of OTA circuit
and it was LVS clean
t
Huh.
k
Look I have just changed the orientation of the capacitor in layout and I screwed OTA's LVS ...
Copy code
Class OTA_post.spice (1):  Merged 19 parallel devices.
Subcircuit summary:
Circuit 1: OTA.spice                       |Circuit 2: OTA_post.spice
-------------------------------------------|-------------------------------------------
sky130_fd_pr__pfet_01v8_lvt (5)            |sky130_fd_pr__pfet_01v8_lvt (15->5)
sky130_fd_pr__nfet_01v8_lvt (3)            |sky130_fd_pr__nfet_01v8_lvt (12->3)
sky130_fd_pr__cap_mim_m3_1 (1)             |sky130_fd_pr__cap_mim_m3_1 (1)
Number of devices: 9                       |Number of devices: 9
Number of nets: 9                          |Number of nets: 9
---------------------------------------------------------------------------------------
NET mismatches: Class fragments follow (with fanout counts):
Circuit 1: OTA.spice                       |Circuit 2: OTA_post.spice

---------------------------------------------------------------------------------------
Net: OUT                                   |Net: OUT
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__cap_mim_m3_1/2 = 1
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: Vmid                                  |Net: li_1340_1520#
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |  sky130_fd_pr__nfet_01v8_lvt/2 = 1
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |  sky130_fd_pr__cap_mim_m3_1/1 = 1
---------------------------------------------------------------------------------------
DEVICE mismatches: Class fragments follow (with node fanout counts):
Circuit 1: OTA.spice                       |Circuit 2: OTA_post.spice

---------------------------------------------------------------------------------------
Instance: sky130_fd_pr__cap_mim_m3_1:C1    |Instance: sky130_fd_pr__cap_mim_m3_1_L3YGC
  1 = 3                                    |  1 = 4
  2 = 4                                    |  2 = 3
---------------------------------------------------------------------------------------
Netlists do not match.
Netlists do not match.
seems that this one was correctly connected
t
Okay, sometimes one error does look like another. . . I'll need to take another look at it with that in mind.
k
let me change the orientation of the other capacitor
reversing polarization of C2 solved the problem of the fanout howewer we still have this line
Copy code
Net: OTA:1/Vmid                            |(no matching net)
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |
:q
t
Post the whole output again?
k
Copy code
Equate elements:  no current cell.
Equate elements:  no current cell.
Equate elements:  no current cell.
Flattening unmatched subcell Tgate in circuit SystemLevel_pre.spice (0)(11 instances)
Flattening unmatched subcell OTA in circuit SystemLevel_pre.spice (0)(5 instances)
Flattening unmatched subcell CurrentMirror in circuit SystemLevel_pre.spice (0)(2 instances)
Flattening unmatched subcell Inverter in circuit SystemLevel_pre.spice (0)(2 instances)
Flattening unmatched subcell VoltageDivider-P in circuit SystemLevel_pre.spice (0)(1 instance)
Flattening unmatched subcell OTA_post in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_APWUPK in circuit SystemLevel.spice (1)(10 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_3ALJPG in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_PF77MM in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_SFAZVM in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_SF5SVM in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_L3YGCM in circuit SystemLevel.spice (1)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_STRFPN in circuit SystemLevel.spice (1)(10 instances)
Flattening unmatched subcell VoltageDivider-P_post in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_U25BZR in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_U25KLQ in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell Tgate_post in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_JMGADZ in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_Z92SJ3 in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_2JG5DZ in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_THKQM4 in circuit SystemLevel.spice (1)(11 instances)
Flattening unmatched subcell Inverter_post in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_JMGADZ in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_THKQM4 in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_KP8PNM in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_MHJ2VF in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell CurrentMirror_post in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_UJUP4X in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_U4BYG2 in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_Q4Q8VJ in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_YND74Q in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_8MQB6L in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell M in circuit SystemLevel.spice (1)(6 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_D7AAL5 in circuit SystemLevel.spice (1)(6 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_7PDTEF in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_AFDLP7 in circuit SystemLevel.spice (1)(2 instances)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_VT6YF8 in circuit SystemLevel.spice (1)(1 instance)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_WXTTNJ in circuit SystemLevel.spice (1)(1 instance)

Class SystemLevel_pre.spice (0):  Merged 1 parallel devices.
Class SystemLevel.spice (1):  Merged 265 parallel devices.
Subcircuit summary:
Circuit 1: SystemLevel_pre.spice           |Circuit 2: SystemLevel.spice               
-------------------------------------------|-------------------------------------------
sky130_fd_pr__cap_mim_m3_1 (9)             |sky130_fd_pr__cap_mim_m3_1 (9)             
sky130_fd_pr__nfet_01v8_lvt (80->77)       |sky130_fd_pr__nfet_01v8_lvt (271->77)      
sky130_fd_pr__pfet_01v8_lvt (55)           |sky130_fd_pr__pfet_01v8_lvt (126->55)      
Number of devices: 141                     |Number of devices: 141                     
Number of nets: 106 **Mismatch**           |Number of nets: 105 **Mismatch**           
---------------------------------------------------------------------------------------
NET mismatches: Class fragments follow (with fanout counts):
Circuit 1: SystemLevel_pre.spice           |Circuit 2: SystemLevel.spice               

---------------------------------------------------------------------------------------
Net: Vref_post                             |Net: OTA_post_2/OUT                        
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |                                           
Net: net2                                  |Net: Tgate_post_8/A                        
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 3    
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 3    
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |                                           
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |                                           
                                           |                                           
Net: OTA:1/Vas                             |Net: OTA_post_4/OUT                        
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__nfet_01v8_lvt/2 = 2        |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
                                           |                                           
Net: OTA_sh                                |Net: Tgate_post_7/A                        
  sky130_fd_pr__cap_mim_m3_1/1 = 2         |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 4    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 4    |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
                                           |                                           
Net: Vref_cmp                              |Net: /OTA_post_1/li_1340_1520#             
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 3    |  sky130_fd_pr__nfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 3    |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
                                           |                                           
Net: CMP_out                               |Net: OTA_post_3/IN_M                       
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    
                                           |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |                                           
Net: GND                                   |Net: Tgate_post_4/A                        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/4 = 2        |  sky130_fd_pr__nfet_01v8_lvt/2 = 1        
                                           |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
                                           |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
                                           |                                           
Net: net4                                  |Net: /OTA_post_1/m1_1000_2472#             
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |  sky130_fd_pr__nfet_01v8_lvt/2 = 2        
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
                                           |                                           
Net: VSS                                   |Net: VSS                                   
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
  sky130_fd_pr__nfet_01v8_lvt/4 = 75       |  sky130_fd_pr__nfet_01v8_lvt/4 = 77       
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 35   |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 37   
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
                                           |                                           
Net: OTA:1/Vmid                            |(no matching net)                          
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |                                           
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |                                           
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |                                           
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |                                           
---------------------------------------------------------------------------------------
Netlists do not match.
Netlists do not match.
m
The layout has 
GND
and 
VSS
nets, while the schematic only has 
VSS
. Are these nets supposed to be connected in the layout?
k
hi David, in fact GND and VSS are shorted
m
Ok sorry, normally the extracted layout is on the left and the schematic is on the right, but looks like you’re comparing them reversed. 
VSS
and 
GND
are 2 separate nets in your schematic. Check your 
SystemLevel_pre.spice
file to find out where.
k
I found 2 GND connection in the schematic file, changed it to VSS and have more LVS issues.
Copy code
---------------------------------------------------------------------------------------
Instance: sky130_fd_pr__cap_mim_m3_1_WXTTN |Instance: sky130_fd_pr__cap_mim_m3_1:C4
  1 = 4                                    |  1 = 8
  2 = 8                                    |  2 = 4
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Instance: Inverter_post_1/sky130_fd_pr__pf |Instance: Inverter:11/sky130_fd_pr__pfet_0
  (1,3) = (83,5)                           |  (1,3) = (83,4)
  2 = 4                                    |  2 = 5
  4 = 83                                   |  4 = 83
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Instance: Inverter_post_1/sky130_fd_pr__nf |Instance: Inverter:11/sky130_fd_pr__nfet_0
  (1,3) = (118,5)                          |  (1,3) = (118,4)
  2 = 4                                    |  2 = 5
  4 = 118                                  |  4 = 118
---------------------------------------------------------------------------------------
in fact two inverters were connected to GND. Here On the Left is the layout and and the right the schematic, as You suggested
m
Getting closer! For one, you can see your capacitor polarity is reversed. That may fix the inverter problem. (Always helpful to post the full log.)
k
let me try
Copy code
Equate elements:  no current cell.
Equate elements:  no current cell.
Equate elements:  no current cell.
Flattening unmatched subcell OTA_post in circuit SystemLevel.spice (0)(5 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_APWUPK in circuit SystemLevel.spice (0)(10 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_3ALJPG in circuit SystemLevel.spice (0)(5 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_PF77MM in circuit SystemLevel.spice (0)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_SFAZVM in circuit SystemLevel.spice (0)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_SF5SVM in circuit SystemLevel.spice (0)(5 instances)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_L3YGCM in circuit SystemLevel.spice (0)(5 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_STRFPN in circuit SystemLevel.spice (0)(10 instances)
Flattening unmatched subcell VoltageDivider-P_post in circuit SystemLevel.spice (0)(1 instance)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_U25BZR in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_U25KLQ in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell Tgate_post in circuit SystemLevel.spice (0)(11 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_JMGADZ in circuit SystemLevel.spice (0)(11 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_Z92SJ3 in circuit SystemLevel.spice (0)(11 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_2JG5DZ in circuit SystemLevel.spice (0)(11 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_THKQM4 in circuit SystemLevel.spice (0)(11 instances)
Flattening unmatched subcell Inverter_post in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_JMGADZ in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_THKQM4 in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_KP8PNM in circuit SystemLevel.spice (0)(1 instance)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_MHJ2VF in circuit SystemLevel.spice (0)(1 instance)
Flattening unmatched subcell CurrentMirror_post in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_UJUP4X in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_U4BYG2 in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_Q4Q8VJ in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_YND74Q in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_8MQB6L in circuit SystemLevel.spice (0)(1 instance)
Flattening unmatched subcell M in circuit SystemLevel.spice (0)(6 instances)
Flattening unmatched subcell sky130_fd_pr__nfet_01v8_lvt_D7AAL5 in circuit SystemLevel.spice (0)(6 instances)
Flattening unmatched subcell sky130_fd_pr__pfet_01v8_lvt_7PDTEF in circuit SystemLevel.spice (0)(1 instance)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_AFDLP7 in circuit SystemLevel.spice (0)(2 instances)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_VT6YF8 in circuit SystemLevel.spice (0)(1 instance)
Flattening unmatched subcell sky130_fd_pr__cap_mim_m3_1_WXTTNJ in circuit SystemLevel.spice (0)(1 instance)
Flattening unmatched subcell Tgate in circuit SystemLevel_pre.spice (1)(11 instances)
Flattening unmatched subcell OTA in circuit SystemLevel_pre.spice (1)(5 instances)
Flattening unmatched subcell CurrentMirror in circuit SystemLevel_pre.spice (1)(2 instances)
Flattening unmatched subcell Inverter in circuit SystemLevel_pre.spice (1)(2 instances)
Flattening unmatched subcell VoltageDivider-P in circuit SystemLevel_pre.spice (1)(1 instance)

Class SystemLevel.spice (0):  Merged 265 parallel devices.
Class SystemLevel_pre.spice (1):  Merged 1 parallel devices.
Subcircuit summary:
Circuit 1: SystemLevel.spice               |Circuit 2: SystemLevel_pre.spice           
-------------------------------------------|-------------------------------------------
sky130_fd_pr__nfet_01v8_lvt (271->77)      |sky130_fd_pr__nfet_01v8_lvt (80->77)       
sky130_fd_pr__pfet_01v8_lvt (126->55)      |sky130_fd_pr__pfet_01v8_lvt (55)           
sky130_fd_pr__cap_mim_m3_1 (9)             |sky130_fd_pr__cap_mim_m3_1 (9)             
Number of devices: 141                     |Number of devices: 141                     
Number of nets: 105                        |Number of nets: 105                        
---------------------------------------------------------------------------------------
NET mismatches: Class fragments follow (with fanout counts):
Circuit 1: SystemLevel.spice               |Circuit 2: SystemLevel_pre.spice           

---------------------------------------------------------------------------------------
Net: Tgate_post_8/A                        |Net: Vref_post                             
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 3    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 3    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    
                                           |                                           
Net: OTA_post_2/OUT                        |Net: net2                                  
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
                                           |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
                                           |  sky130_fd_pr__nfet_01v8_lvt/2 = 1        
                                           |                                           
Net: OTA_post_4/OUT                        |Net: Vref_cmp                              
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 3    
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 3    
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: /OTA_post_1/li_1340_1520#             |Net: OTA:1/Vas                             
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |  sky130_fd_pr__nfet_01v8_lvt/2 = 2        
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |                                           
                                           |                                           
Net: /OTA_post_1/m1_1000_2472#             |Net: OTA:1/Vmid                            
  sky130_fd_pr__nfet_01v8_lvt/2 = 2        |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__nfet_01v8_lvt/2 = 1        
                                           |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
                                           |                                           
Net: Tgate_post_4/A                        |Net: CMP_out                               
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__nfet_01v8_lvt/2 = 1        |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 2    
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 1    |                                           
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |                                           
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: VSS                                   |Net: VSS                                   
  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 37   |  sky130_fd_pr__nfet_01v8_lvt/(1|3) = 37   
  sky130_fd_pr__nfet_01v8_lvt/4 = 77       |  sky130_fd_pr__nfet_01v8_lvt/4 = 77       
  sky130_fd_pr__pfet_01v8_lvt/2 = 1        |  sky130_fd_pr__pfet_01v8_lvt/2 = 1        
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 1    
  sky130_fd_pr__cap_mim_m3_1/1 = 1         |  sky130_fd_pr__cap_mim_m3_1/1 = 1         
  sky130_fd_pr__cap_mim_m3_1/2 = 1         |  sky130_fd_pr__cap_mim_m3_1/2 = 1         
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Net: VDD                                   |Net: V1V8                                  
  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 31   |  sky130_fd_pr__pfet_01v8_lvt/(1|3) = 31   
  sky130_fd_pr__pfet_01v8_lvt/4 = 52       |  sky130_fd_pr__pfet_01v8_lvt/4 = 52       
---------------------------------------------------------------------------------------
DEVICE mismatches: Class fragments follow (with node fanout counts):
Circuit 1: SystemLevel.spice               |Circuit 2: SystemLevel_pre.spice           

---------------------------------------------------------------------------------------
Instance: Inverter_post_1/sky130_fd_pr__pf |Instance: Inverter:11/sky130_fd_pr__pfet_0 
  (1,3) = (83,5)                           |  (1,3) = (83,4)                           
  2 = 4                                    |  2 = 5                                    
  4 = 83                                   |  4 = 83                                   
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Instance: Inverter_post_1/sky130_fd_pr__nf |Instance: Inverter:11/sky130_fd_pr__nfet_0 
  (1,3) = (118,5)                          |  (1,3) = (118,4)                          
  2 = 4                                    |  2 = 5                                    
  4 = 118                                  |  4 = 118                                  
---------------------------------------------------------------------------------------
Netlists do not match.
Netlists do not match.
C4 fixed
m
What does “C4 fixed” mean? Is LVS passing? Since your layout and schematic subcircuit names don’t match, the design is flattened before comparing. You could try appending this to your setup file.
Copy code
equate classes "-circuit1 Tgate_post" "-circuit2 Tgate" 
equate classes "-circuit1 OTA_post" "-circuit2 OTA"
equate classes "-circuit1 CurrentMirror_post" "-circuit2 CurrentMirror"
equate classes "-circuit1 Inverter_post" "-circuit2 Inverter"
equate classes "-circuit1 VoltageDivider-P_post" "-circuit2 VoltageDivider-P"
k
the comment about C4 was about fixing the reversely connected capacitor
👍 1
Copy code
---------------------------------------------------------------------------------------
Instance: OTA_post_0/sky130_fd_pr__nfet_01 |Instance: OTA:14/sky130_fd_pr__nfet_01v8_l
  (1,3) = (81,4)                           |  (1,3) = (81,4)
  2 = 4                                    |  2 = 4
  4 = 81                                   |  4 = 81
                                           |
Instance: OTA_post_1/sky130_fd_pr__nfet_01 |(no matching instance)
  (1,3) = (81,6)                           |
  2 = 4                                    |
  4 = 81                                   |
                                           |
                                           |
Instance: OTA_post_4/sky130_fd_pr__nfet_01 |(no matching instance)
  (1,3) = (81,6)                           |
  2 = 4                                    |
  4 = 81                                   |
                                           |
---------------------------------------------------------------------------------------

---------------------------------------------------------------------------------------
Instance: OTA_post_0//sky130_fd_pr__nfet_0 |Instance: OTA:14/sky130_fd_pr__nfet_01v8_l
  (1,3) = (81,4)                           |  (1,3) = (81,4)
  2 = 4                                    |  2 = 4
  4 = 81                                   |  4 = 81
                                           |
Instance: OTA_post_1//sky130_fd_pr__nfet_0 |(no matching instance)
  (1,3) = (81,4)                           |
  2 = 4                                    |
  4 = 81                                   |
                                           |
                                           |
Instance: OTA_post_4//sky130_fd_pr__nfet_0 |(no matching instance)
  (1,3) = (81,4)                           |
  2 = 4                                    |
  4 = 81                                   |
                                           |
---------------------------------------------------------------------------------------
Netlists do not match.
@Mitch Bailey any idea how to solve those issues ?
Copy code
Class SystemLevel.spice (0):  Merged 49 parallel devices.
Subcircuit summary:
Circuit 1: SystemLevel.spice               |Circuit 2: SystemLevel_pre.spice
-------------------------------------------|-------------------------------------------
OTA_post (5)                               |OTA (5)
VoltageDivider-P_post (1)                  |VoltageDivider-P (1)
Tgate_post (11)                            |Tgate (11)
Inverter_post (2)                          |Inverter (2)
sky130_fd_pr__nfet_01v8_lvt (70->31)       |sky130_fd_pr__nfet_01v8_lvt (31)
CurrentMirror_post (2)                     |CurrentMirror (2)
sky130_fd_pr__pfet_01v8_lvt (12->2)        |sky130_fd_pr__pfet_01v8_lvt (2)
sky130_fd_pr__cap_mim_m3_1 (4)             |sky130_fd_pr__cap_mim_m3_1 (4)
Number of devices: 58                      |Number of devices: 58
Number of nets: 78                         |Number of nets: 78
---------------------------------------------------------------------------------------
Resolving automorphisms by property value.
Resolving automorphisms by pin name.
Netlists match uniquely.
Circuits match correctly.
There were property errors.
sky130_fd_pr__pfet_01v8_lvt_8MQB6L:M8/sky130_fd_pr__pfet_01v8_lvt:0 vs. sky130_fd_pr__pfet_01v8_lvt:M8:
 w circuit1: 24.2   circuit2: 11   (delta=75%, cutoff=7%)
sky130_fd_pr__nfet_01v8_lvt_KP8PNM:M6/sky130_fd_pr__nfet_01v8_lvt:0 vs. sky130_fd_pr__nfet_01v8_lvt:M6:
 w circuit1: 24.2   circuit2: 11   (delta=75%, cutoff=7%)
Cells have no pins;  pin matching not needed.
Device classes SystemLevel.spice and SystemLevel_pre.spice are equivalent.
Circuits match uniquely.
Property errors were found.
The following cells had property errors:
last lap, any comments on that ? @Mitch Bailey @Tim Edwards
solved!
👍 1
t
Glad you solved it; I was on the road for part of the day.
k
No worries, have a good afternoon
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