is there a way to specify a clock port as one wire in a bus? like io_in[0] ? @Matt Liberty @donn

maybe with io_in\[0\] The tcl script messes up brackets

I think you mean

io_in\[0\]

. You could also try

{io_in[0]}

Of course, thank you!

Yes, we did this with openram_testchip. There was also a bug but I hope/think it got fixed in OpenLane. I filled an issue...

thank you