Stefan Schippers
03/09/2022, 10:58 AM** sch_path: /home/schippes/.xschem/xschem_library/xschem_sky130/sky130_tests/test_reram.sch
**.subckt test_reram
Y1 BE TE rram2_model m=1
**.ends
**** begin user architecture code
.model rram2_model rram2 rram2_params.scs
**** end user architecture code
.end
based on the example i found here... for simulating this some Verilog-AMS expert must step in and give some advice.Bhanprakash Goswami
03/09/2022, 11:06 AM