Check out my repo for the reram model using openvaf and ngspice: https://github.com/barakhoffer/sky130_ngspice_reram I have updated the model and turned it to a well-posed one and now it shows switching of the ReRAM device when simulating with ngspice!

Did people here see https://twitter.com/maxhodak_/status/1635330756276015105 (and https://science.xyz/services/foundry )?

Hello, I attempted to utilize the reram model with the pre_osdi command, but ngspice displayed an error stating that it could not recognize the osdi command, despite using ngspice-39. Could you please explain why this is happening? @Stefan Schippers

Hi All, I am completely new to circuit design, and we started using the sky130 process for our design since it has the option for a mix-signal design using a reram cell. I installed xschem, magic and open-pdk an ngspice-38 using ADMS. However, when i tried to simulate the I-V output for the reram cell i got the following error on ngspice: The first issue: % l_s_d(): Symbol not found: /home/schippes/share/xschem/xschem_library/devices/vsource.sym l_s_d(): Symbol not found: /home/schippes/share/xschem/xschem_library/devices/vsource.sym However, the library for the reram is installed with other sky130 libraries in my local directory not the path given in the error message.when I press on the current/voltage source and edit the path for vsource to be my local directory for vsource I got the following error: Circuit: ** sch_path: /home/eda_work/eman/hassan/open_pdks/sources/xschem_sky130/sky130_tests/tb_reram.sch Error on line 3 or its substitute: n1 top 0 sky130_fd_pr_reram__reram_model unknown device type - error The simulation interrupted due to an error!. I am not sure what is the problem and how i can fix it. Appreciate your help in this regard. Note : I installed the open_pdk, sxchem and ngspice using the following video instructions: @Stefan Schippers YouTube | Stefan Schippers

Install xschem + xschem_sky130 + skywater-pdk + ngspice on your linux system▾

Thank you for the response. However, the instructions you added to Jupyter could be clearer to me. Sorry, I am still learning, and I am a bit confused.

now i got the following error when using ngspice to test the reram model available in xschem : Note: No compatibility mode selected! Error opening osdi lib "/mnt/sda7/sky130_fd_pr_reram_git/cells/reram_cell/sky130_fd_pr_reram__reram_cell.osdi": No such file or directory! Error: Library /mnt/sda7/sky130_fd_pr_reram_git/cells/reram_cell/sky130_fd_pr_reram__reram_cell.osdi couldn't be loaded! Circuit: ** sch_path: /home/eman/.xschem/xschem_library/xschem_sky130/sky130_tests/tb_reram.sch Error: unknown subckt: x2 3v Simulation interrupted due to error! Hpwever, when I follow the steps ngspice 1 -> However, when I follow the steps in repo:https://github.com/barakhoffer/sky130_ngspice_reram to plot the I-V for reram I got the following plo, which does not reflect the reram behavior

Screen Shot 2023-04-12 at 6.17.53 PM.png

Looks good! I would just change it and take the negative of the voltage source current so it will be clearer

Hi All, after i tried to fix the above error, I end up with the following error when tried to simulate the rearm cell. Error on line 5 or its substitute: n1 top 0 sky130_fd_pr_reram__reram_model could not find a valid modelname Simulation interrupted due to error!. why it cant recognize the reram model?

On the other side, we are using cadence tools with spector simulator for our circuit analysis. Is there a compatible spice model that we can use for virtuoso and spector?

Hi All, after update/reinstall the open_pdk, and when try to simulate the reram_tb using ngspice I got the following errors: Note: Compatibility modes selected: hs a Error opening osdi lib "/home/eda_work/eman/hassan/share/pdk/sky130b/libs.tech/ngspice/sky130_fd_pr_reram__reram_module.osdi": No such file or directory! Error: Library /home/eda_work/eman/hassan/share/pdk/sky130b/libs.tech/ngspice/sky130_fd_pr_reram__reram_module.osdi couldn't be loaded! Circuit: ** sch_path: /home/eda_work/eman/hassan/share/pdk/sky130b/libs.tech/xschem/sky130_tests/tb_reram.sch Error on line: n.xr1.n1 top 0 xr1.nfilament sky130_fd_pr_reram__reram_model could not find a valid modelname Simulation interrupted due to error! any advice? @Stefan Schippers @Barak Hoffer @mkk @Tim Edwards

Hi All, thank you @Stefan Schippers for your prompt response: I have already clone the https://github.com/barakhoffer/sky130_ngspice_reram (@Barak Hoffer) and I have

<http://sky130_fd_pr_reram__reram_module.va|sky130_fd_pr_reram__reram_module.va>

sky130_fd_pr_reram__reram_module.osdi

in the path /home/eda_work/eman/hassan/share/pdk/sky130B/libs.tech/ngspice. the current PDK_ROOT I added to the .bashrc are

export PDK_ROOT=/home/eda_work/eman/hassan/share/pdk

when i checked the netlist for tb_reram test case I got the following:

** sch_path: /home/eda_work/eman/hassan/share/pdk/sky130B/libs.tech/xschem/sky130_tests/tb_reram.sch

**.subckt tb_reram

V1 net1 0 PWL (0 0 0.25u 1.8 0.5u 0 0.75u -1.8 1.0u 0.0)

.save i(v1)

XR1 TOP 0 sky130_fd_pr_reram__reram_cell Tfilament_0=3.8e-9

Vreram net1 TOP 0

.save i(vreram)

**** begin user architecture code

.control

save all

tran 0.1n 1.5u

write tb_reram.raw

.endc

**** end user architecture code

**.ends

**** begin user architecture code

.subckt sky130_fd_pr_reram__reram_cell TE BE Tfilament_0=3.3e-9 area_ox=0.1024e-12

N1 TE BE nFilament sky130_fd_pr_reram__reram_model

.ic v(nFilament)={Tfilament_0*1.0e9}

.ends sky130_fd_pr_reram__reram_cell

.model sky130_fd_pr_reram__reram_model sky130_fd_pr_reram__reram_module area_ox=0.1024e-12  area_ox

+ = 0.1024e-12  Tox = 5.0  Tfilament_max = 4.9  Tfilament_min = 3.3  Eact_generation = 1.501

+  Eact_recombination  = 1.500  I_k1  = 6.140e-5  Tfilament_ref = 4.7249  V_ref = 0.430  velocity_k1 = 150  gamma_k0  =

+ 16.5  gamma_k1  = -1.25  Temperature_0 = 300  C_thermal = 3.1825e-16  tau_thermal = 0.23e-9  t_step  =

+ 1.0e-9  smoothing = 1e-7  Kclip = 200

.control

pre_osdi

+ /home/eda_work/eman/hassan/share/pdk/sky130B/libs.tech/ngspice/sky130_fd_pr_reram__reram_module.osdi

.endc

How many cycles can a SKY130 ReRAM cell survive? Just curious about the feasability of implementing the HH model using the memristor analogy.

Hi All, Any advice about the previous question in the following thread? https://open-source-silicon.slack.com/archives/C02Q2DE33QF/p1681642289780979

Hi All, thank you, @Stefan Schippers for your response. I mean after cloning the https://github.com/barakhoffer/sky130_ngspice_reram and having the

<http://sky130_fd_pr_reram__reram_module.va|sky130_fd_pr_reram__reram_module.va>

sky130_fd_pr_reram__reram_module.osdi

in the pdk path in the path /home/eda_work/eman/hassan/share/pdk/sky130B/libs.tech/ngspice. Also, the current PKK_ROOT is: export PDK_ROOT=/home/eda_work/eman/hassan/share/pdk. However, I have still has the same error when I tried to simulate the tb_reram available in the path

sch_path: /home/eda_work/eman/hassan/share/pdk/sky130B/libs.tech/xschem/sky130_tests/tb_reram.sch

the error is as the following: Error opening osdi lib "/home/eda_work/eman/hassan/share/pdk/sky130b/libs.tech/ngspice/sky130_fd_pr_reram__reram_module.osdi": No such file or directory! Error: Library /home/eda_work/eman/hassan/share/pdk/sky130b/libs.tech/ngspice/sky130_fd_pr_reram__reram_module.osdi couldn't be loaded! Circuit: ** sch_path: /home/eda_work/eman/hassan/share/pdk/sky130b/libs.tech/xschem/sky130_tests/tb_reram.sch Error on line: n.xr1.n1 top 0 xr1.nfilament sky130_fd_pr_reram__reram_model could not find a valid modelname Simulation interrupted due to error!. I am not sure what I missed and how to fix the issue.

May I know if the Chiplgnite shuttles in the future support the ReRAM process? Since I saw it uses SKY130A but isn't RRAM only included in SKY130B? Could anyone help explain it? Thanks! @Tim Edwards

I encountered an error while attempting to simulate the 'tb_reram.sch' file in the Sky130 B process. Could you kindly provide guidance on how to troubleshoot and resolve this particular error?

Can we modify the design for different ReRAM circuits or can we only use 1T1R structure?

Hi everyone, recently, I was able to do a ReRAM simulation using NGSpice thanks to the updated symbol from Barak Hoffer. I am now trying to test write/read operations on a 1T1R cell, but I am confused about how to set up a test bench on how to do this. I think I know how to do the write operations by using the information provided in the table on the ReRAM documentation for the Skywater process. However, I am unsure of how to verify if the write was successful or how to read the results out of the 1T1R cell. Any help would be greatly appreciated. Thanks!

@Mauricio Montanares has left the channel

Hi everyone, I have configured SKY130B as my technology in order to use the ReRAM devices. However, when I open the klayout, I haven't found the layers for ReRAM. I cloned one ReRAM object from github and found they have additional 3 layers which is added to layout when I opened it but didn't exist in the original .lyt file. So should we add these three layers by ourselves?

I've been trying to do 1T1R simulations through Ngspice and I keep getting errors. I think I am having some convergence issues. Has anyone had any luck doing these simulations, or can help identify what I might be doing wrong?

hi we are currently working with reram, but finding difficultly in importing reram in magic.how can we move further

@Mohammed Fayiz Ferosh has left the channel

We form the reram ourselves when we get our chips right? It arrives in the "pristine state"?

Are we restricted to 1T1R or can we also 1T(n)R?

Has anyone done their own measurements on the resistance and know whether the values in this plot are accurate/typical?

@Abhinav Uppal has left the channel

@Barak Hoffer @Stefan Schippers There is a serious issue with the reram ngspice model. If I put vdd with 0 volt below BE pin as a probe, the simulation aborted with convergence failing, and a ridiculous current was plotted on the probe. I guess the terms I(nfilament, BE) and I(nT, BE) cause the problem. Do such currents necessarily get through the BE pin? I think this approach could cause vulnerability.