Hello, is anyone using verilog to design digital hardware on open galaxy? If so, could you walk me through the software that you're accessing? thanks!

Hi @Omiya Hassan I am not sure what you mean by "using verilog to design" as in you meant design verification? I have not used open galaxy yet but maybe @mshalan could help?

yeah, basically writing in verilog to compute the design verification.

ok, then efabless should probably answer this: @mkk?

Would this be of any help? https://info.efabless.com/knowledgebase/the-efabless-digital-synthesis-flow/