With SRAM you can read one word (e.g. 32 bit) at a time. With Flash you usually have to read a whole page (512 Bytes, 1024 Bytes, 1037 Bytes ... something like that) at a time.

@User: So in case of SRAM, one word can be written at a time, right? But why does it take 25 cycles? Even for non-pipelined case, isn't this number is high?

Hmm, 25 cycles seems to be high to me too, I agree. I don't know why. Perhaps the bus width is too short, and it needs several transfers? If you have an 8 bit SRAM, and you have 32 bit processor, you need 4 transfers, which would be about 6 cycles per transfer, that would sound reasonable

Thanks @User, Is there any way to increase our SRAM size? Because currently there is only 2KB SRAM in caravel. If we include a seperate SRAM in the user_project area, will we be able to change the linker file so that process can create the runtime variables in the new SRAM?

Perhaps you can add a SRAM and attach it to the wishbone bus?