@User It will be very helpful if we can have at least some FTDI connections freezed for JTAG and UARTs. For example, I am incorporating JTAG DFT in my user design. Having a freezed pinout will help saving me gpios.

Thanks for the input. I’ll review with the team for the next update.

Hi, I assume that JTAG is not implemented in Caravel SoC right now. Can you comment on how you guys are planning to support In system programming of program flash. Are you going to employ HKSPI?

check the caravel datasheet for this info. Essentially the chip is held in a special pass through mode, and then the flash can be written via the first 4 io pins