i am trying to integrate my ldo design in user analog project wrapper so first i tried to simulate the available schematic:analog_wrapper_tb.sch before integrating my schematic but i got the following error:

Looks like a failure to include the HVL standard cell SPICE library in the simulation testbench netlist.

Does this mean thay my pdk is old and should be reinstalled?

A recent push I made to caravel_user_project_analog was to update the xschemrc file in the xschem directory. That now depends on environment variable PDKPATH which either takes a default of /usr/share/pdk/sky130A or can be set in the OS environment before running xschem. Once you've done that, there should be a ".include" line in the output netlist (e.g., analog_wrapper_tb.spice) that included the HVL standard cell library.

okay thanks. Now i could simulate the wrapper testbench ..i want to add my schematic instead of the used example but i don't understand what is the difference between the pins in the schematic level

The "esd" and "noesd" pins are connections to the digital GPIO pads that can allow the GPIO pad to be used as an analog pad, if you shut off both the GPIO's digital input and output buffers, in the boot program. "esd" is preferred and has a resistor between the pin and the pad to provide some ESD protection. The "noesd" pin is just a straight-through connection, so you would need to provide your own protection circuitry.