Hi I was trying to harden the user_project_wrapper. But my tool shows error at step index 16 detailed placement. It looks like the tool tries to place 600+ IO pins. My guess is MPRJ_IO_PADS is not set properly somehow. Any suggestion how to debug this?

It is defined in verilog/rtl/defines.v

I didn't change the lines about $script_dir/../../caravel/verilog/rtl/defines.v So it should read from the define file