Trying to full-chip gate level simulations with ca...
# caravel
k
Trying to full-chip gate level simulations with caravel and subservient, fails with 49893 errors out of which 49891 are references to unkown module sky130_ef_sc_hd__fakediode_2. Builds just fine, passes DRC and LVS. Anybody know which approach I should take to this? Using a fork from caravel_user_project at tag mpw-two-c, PDK built from openlane at tag v0.15
Just copied the model in from the PDK to my project, that solves that.