I pre-generated lef and gds files for a module cal...
# caravel
y
I pre-generated lef and gds files for a module called "regfile", instantiated them in a module called "cpu", and used them, but I got the following error. Does anyone know how to fix this?
[ERROR GRT-0076] Net reg_w_data\[0\] not properly covered.
Error: or_replace.tcl, 93 GRT-0076
My project is here: https://github.com/cpu-dev/caravel_jacaranda-8/tree/split_gds cpu module is here: https://github.com/cpu-dev/caravel_jacaranda-8/blob/7a6c31fe5e783d58712835361da14748a5c7525f/verilog/rtl/jacaranda-8/cpu.v#L105 openlane configuration is here: https://github.com/cpu-dev/caravel_jacaranda-8/blob/split_gds/openlane/cpu/config.tcl Thank you.
r
I'm not sure if your error comes due to this, but I think it is necessary. In the config.ctl you need to write
set ::env(MACRO_PLACEMENT_CFG) $script_dir/macro_placement.cfg
(the path is in the same place as config.ctl) Inside that file, I think you need to put the place and location of the macro, like
SRAM_1 30 482.040 N
where SRAM_1 is the instance name of the module, 30 x position, 482.040 y position and N is the orientation
y
Thanks for the quick reply. I'll give it a try.