@User: The proxy port is added to the cell that has no matching pin, so that in the case where one netlist has a pin that is a no-connect and in the other case the pin does not exist, the result wil be a match. In this case, there are two solutions: (1) rewrite the schematic/verilog side netlist so that each unique pin is represented by a unique signal name, or (2) use

extract unique noports

instead of

extract unique

. The

noports

option will not assign unique names to ports, only to non-port labels. It does mean that you need to trust that all ports are connected as labeled.

Tim, thanks for the reply. I feel that, ideally, multiple disconnected ports of the same name in the layout, should be verifiable as being connected in a higher hierarchy. Do you agree? The current magic setup (correctly) extracts the ports uniquely, but the merging of nets in higher levels is not implemented in netgen, correct?