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I can think of lots of interesting ways to use the...
# shuttle
m
I can think of lots of interesting ways to use the RISC-V; for example to reconfigure a user circuit which comprises an adiabatic FPGA. This could allow a wide variety of different demonstrations to be done using a single chip. :)
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k
what's an adiabatic FPGA?
m
Hi Kevin, this would be an FPGA comprised of adiabatic CMOS cells, which would allow designers to experiment with adiabatic logic architectures. This provides the nice property that energy dissipation per operation can be much lower than standard CMOS (without having to either go to newer process nodes or lower supply voltages).
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k
about how much lower dissipation? any major disadvanges:) ?
m
The dissipation is mainly only limited by leakage and the energy dissipation in the power supply. The disadvantages are greater area and lower speed. However, it can still be useful for applications whose performance is mainly limited by power dissipation. This is true in many systems today, which is why there's so much dark silicon.
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...point being, in a power-limited system, adiabatic switching lets us do a systems engineering tradeoff where we can lower the serial performance (clock frequency) and increase the hardware cost, in exchange for improving the energy efficiency (ops/joule), and thereby increase the aggregate parallel performance (system throughput) within a given system power constraint. A similar tradeoff can be done with ordinary voltage scaling, but not over nearly as wide a range.
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k
can you point me to any introductory reading material on how to design adiabatic switching logic? sounds very interesting, but I don't see how it works without ... any switching
m
Haha, yeah, someday I need to write the authoritative textbook on all this stuff, but in the meantime here's a paper I wrote a while back that outlines one particular style that I use. There are references there back into some of the seminal literature on the topic. http://revcomp.info/legacy/revcomp/AdiaMEMS/MLPD-04.pdf
k
thanks!
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