Does the precheck on Efabless server use the laste...
# shuttle
h
Does the precheck on Efabless server use the lastest version on Github? I got a lot of DRC Violations (might be with the SRAM macro):
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STDOUT: {{PROGRESS}} Executing Step 6 of 6: DRC Violations Checks
STDOUT: {{PROGRESS}} Running Magic DRC Checks...
STDOUT: {{FAIL}} DRC Checks on GDS Failed, Reason: Total # of DRC violations is 24768002
STDOUT: TEST FAILED AT STEP 6
STDOUT: Full log could be found at /mnt/uffs/user/u5166_duyhieu/design/VCO-Based-ADC/jobs/mpw_precheck/330cfffa-4936-4ca5-a0bb-fefa873a91ac/full_log.log
STDOUT: {{PROGRESS}} Compressing the gds files
m
I know that special stuff was needed to pass designs with SRAM, but I don't know the status of it. Maybe @Tim Edwards or @Matthew Guthaus could help
t
@Hieu Bui: Which SRAM macro are you using? Our precheck is supposed to be abstracting any of the macros from the efabless sky130_sram_macros library so that those blocks are hidden from magic's DRC checker, since magic's tech file doesn't encode the special SRAM DRC rules.
h
@Tim Edwards: I am currently using 4kbyte SRAM. I am trying to change it into 2kbyte SRAM because @Matthew Guthaus found some problems with the 4kbyte SRAM simulation. Anyway, I ran the precheck on my machine, it has 8 steps while the submitting the job on Efabless server only has 6 steps.
j
@Hieu Bui just confirming that the precheck repo has been update to abstract the sram macros, but the precheck on our site is still being updated. should be corrected soon.
m
@jeffdi What about me? I have other SRAMs that are not in the sram repo.
I don't want people to use them so I haven't put them there.
j
@Matthew Guthaus you can include them directly and we will work around for your project.
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