Rodrigo Huerta Gañan
10/09/2021, 3:31 PMTim Edwards
10/09/2021, 10:25 PMla_test1.c
and use the RISCV gcc toolchain to compile a hex file that can used in a verilog testbench like it's loaded onto an SPI flash chip that is attached to the Caravel chip and is read by the microcontroller on startup.Rodrigo Huerta Gañan
10/09/2021, 10:32 PM