open-source-silicon.dev

<@U016H5X1K62>:  I'm not sure what's going on;  magic does not (normally) ignore dummy devices.  But it could be that the extensions I made to the extract section (fairly recently) could be causing this.  Thanks for the heads-up;  I'll investigate.

<@U016H5X1K62>:  I definitely cannot reproduce your problem.  I extracted the abovementioned device in magic and got an output with four devices, properly connected, as follows:

```* NGSPICE file created from test.ext - technology: sky130A

.subckt sky130_fd_pr__rf_nfet_01v8_lvt_cM02W1p65L0p15 GATE SOURCE DRAIN SUBSTRATE
X0 SOURCE SUBSTRATE SUBSTRATE SUBSTRATE sky130_fd_pr__nfet_01v8_lvt w=1.65e+06u l=150000u
X1 DRAIN GATE SOURCE SUBSTRATE sky130_fd_pr__nfet_01v8_lvt w=1.65e+06u l=150000u
X2 SUBSTRATE SUBSTRATE SOURCE SUBSTRATE sky130_fd_pr__nfet_01v8_lvt w=1.65e+06u l=150000u
X3 SOURCE GATE DRAIN SUBSTRATE sky130_fd_pr__nfet_01v8_lvt w=1.65e+06u l=150000u
.ends


* Top level circuit test

Xsky130_fd_pr__rf_nfet_01v8_lvt_cM02W1p65L0p15_0 B E D A sky130_fd_pr__rf_nfet_01v8_lvt_cM02W
1p65L0p15
.end```

test.gds

<@U016EM8L91B> I've looked into this further and I can create the issue using this simplified GDS - but only when the cell is flattened and then export is performed.
I had been flattening because DRC needs this. But I realise now that it's much better for LVS/PEX to not flatten so I will change my process there so this issue falls away.