Exporting my gds file I am getting problems reported. not sure if its actually an issue though. It seems to be throwing this message for each instance of a cell from the HVL logic library. Anyone else seen something similar?

CIF error in cell switch_control, layer HVI: parent and child disagree on CIF

This happens more often with analog designs. It is usually not a problem but sometimes can be. The underlying cause of "parent and child disagree" errors is the automatic generation of GDS layers. Magic generates GDS for the child cell, and then GDS for the parent cell that includes resolving issues like spacing errors between sibling child cells. But in some cases the generation rules may be written such that the GDS for the flattened layout has less mask material in it than the child cell does. So the child cell is adding extra material in places where it would not be generated if the design were just created on a flat layout. It is hard to see where these errors are because if you do "cif see HVI" in the layout, magic will flatten the layout there, generate the output layers, and display them. So you won't see the extra layout that the error is complaining about. However, those errors will leave feedback entries that cover those exact errors. So you need to do a combination of "cif see HVI" plus looking at the feedback areas marked, and see if the HVI layer is okay to be inside the feedback areas or not. If it looks like HVI is ending up somewhere where it shouldn't be, then you might need to move cells around to make the problem disappear. You can also use the "MASKHINTS_HVI" property to indicate where the HVI layer should go, which can be used to cover over areas of parent/child disagreement. Just be careful with mask hints, because they can't be moved or erased except by modifying the property.

If I am generating valid-seeming GDS files will I be fine?

That doesn't really mean anything. Generated layers like HVI are processed on GDS input to create derived layers and then discarded, so any kind of error caused by parent/child interactions can end up being missed by magic. You really do need to do a cursory check on the areas indicated by the feedback and eyeball it to make sure it's a false positive.

The HVI layer defines the thick oxide for the HV devices, right?

It looks okay to me. The weird edges just come from the complicated algorithm used to auto-generate the HVI layer. There shouldn't be any issues inside a properly tiled block of HV logic.