@User Whenever I extract my design using ext2spice, it keeps black-boxing the two standard cell DFFs I'm using (dfxbp_1 and dfrbp_1). In order to get LVS to pass, I have to manually copy and paste the spice circuit into the layout LVS file; otherwise I'm short a hundred devices. Is there a way to prevent this blackboxing from happening?

Is this extracting from a batch script or directly from the layout? Cells should not be black-boxed in extraction unless they are abstract views in the layout. Do you have other standard cells in the layout that are not being black-boxed?

This is directly from the layout. Yep, all the other standard cells I'm using (NANDs and inverters, etc.) work fine.

It won't have any transistors in it.

Oh you're right that did happen somehow. Not sure what changed since I designed it two weeks ago...unless my update of open_pdks did something.

Okay. If there's a mix of abstract cells, then it's probably the case that the top level .mag file has the "maglef" in the path for those two cells. If you just edit the file and change "maglef" to "mag", they'll stop being abstract views.

Yep that fixed it thanks! Actually somehow the path had just been completely deleted for those two cells for some reason.