Hongzhe Jiang
06/19/2021, 9:21 AMX0 *vdd A B vdd* sky130_fd_pr__pfet_01v8 ....
X2 *B A vdd vdd* sky130_fd_pr__pfet_01v8 ....
These are two fingers of the same pmos, whose gate is connected to A, drain to B, source and bulk to vdd.Tim Edwards
06/19/2021, 2:02 PMHongzhe Jiang
06/20/2021, 4:26 AMext2spice merge conservative
command to merge the finger, the pin order of the output netlist will be X0 vdd A B vdd
, where the source and drain are flipped. Surely it won't have any impact on the function of the circuit, but that is considered as a mismatch between the schematic and layout, thus failing the lvs.... Is there a good way to do this?Mitch Bailey
06/21/2021, 9:13 AMTim Edwards
06/21/2021, 12:42 PM