Hello all I am not able to run Netgen in batch mode by invok open-source-silicon.dev #magic

Hello all, I am not able to run Netgen in batch mo...

Anchit Proch

10/12/2021, 6:55 AM

Hello all, I am not able to run Netgen in batch mode by invoking the .tcl file. The error message indicates that the file

libtk8.6.so

could not read the shared library. What could be the reasons for this?

Mitch Bailey

10/12/2021, 8:11 AM

@Anchit Proch Are you running in docker?

Anchit Proch

10/12/2021, 10:02 AM

@Mitch Bailey No, I am not. Is there some problem associated with docker?

Mitch Bailey

10/12/2021, 10:20 AM

Just the opposite. There may be problems if you aren't using docker!

Mitch Bailey

10/12/2021, 10:22 AM

Go to your openlane installation directory and run

make mount

to start docker.

Anchit Proch

10/12/2021, 10:43 AM

It worked! Thanks a lot.

Anchit Proch

10/12/2021, 11:44 AM

Netgen cannot read any device in the netlist generated from the layout, however.

Mitch Bailey

10/12/2021, 11:54 AM

In the spice file extracted from the layout?

Mitch Bailey

10/12/2021, 11:55 AM

Are you trying to run LVS?

Anchit Proch

10/12/2021, 11:59 AM

Yes, I am trying to run LVS in batch mode.

Mitch Bailey

10/12/2021, 12:38 PM

If you have the GDS and gate level verilog, you could try

flow.tcl -design <design_name> -tag <tag_name> -lvs -gds <gds_file> -net <gate_level_verilog_file>

in docker.

flow.tcl

expects a

<design_name>/config.tcl

file. It will handle the extraction and setup the netgen command.

Mitch Bailey

10/12/2021, 12:40 PM

If your design is under

caravel_user_project

, you can run

make lvs-<design_name>

make lvs-gds-<design_name>

but both of these are black box LVS.

Anchit Proch

10/12/2021, 12:49 PM

Actually, I have an analog design. Do any of your suggestions work for analog flows?

Mitch Bailey

10/12/2021, 1:29 PM

I think either of them would work as long as they are setup the same. For example, if you're using the

caravel_user_project_analog

framework and had your design under

openlane/<design_name>

with a

config.tcl

file under that.

Anchit Proch

10/12/2021, 2:05 PM

Is it not possible to run LVS in a Linux environment? I have to verify my design for some post-layout simulations too.

Mitch Bailey

10/12/2021, 6:35 PM

It should be possible. Can you paste your netgen command here?

Anchit Proch

10/13/2021, 9:56 AM

Copy code

$ netgen -batch lvs "5_Stage_MSSRO.spice" "5_Stage_NSO_Xschem.spice" /home/open_pdks/sky130/sky130A/libs.tech/netgen/sky130A_setup.tcl comp.out
Warning: netgen command 'format' use fully-qualified name '::netgen::format'
Warning: netgen command 'global' use fully-qualified name '::netgen::global'
Reading netlist file 5_Stage_MSSRO.spice
Call to undefined subcircuit sky130_fd_pr__nfet_01v8
Creating placeholder cell definition.
Call to undefined subcircuit sky130_fd_pr__pfet_01v8
Creating placeholder cell definition.
Reading netlist file 5_Stage_NSO_Xschem.spice
Call to undefined subcircuit sky130_fd_pr__nfet_01v8
Creating placeholder cell definition.
Call to undefined subcircuit sky130_fd_pr__pfet_01v8
Creating placeholder cell definition.
Reading setup file /home/open_pdks/sky130/sky130A/libs.tech/netgen/sky130A_setup.tcl
No property area found for device c
Model sky130_fd_pr__nfet_01v8 pin 1 == 3
No property mult found for device sky130_fd_pr__nfet_01v8
No property sa found for device sky130_fd_pr__nfet_01v8
No property sb found for device sky130_fd_pr__nfet_01v8
No property sd found for device sky130_fd_pr__nfet_01v8
No property nf found for device sky130_fd_pr__nfet_01v8
No property nrd found for device sky130_fd_pr__nfet_01v8
No property nrs found for device sky130_fd_pr__nfet_01v8
Model sky130_fd_pr__nfet_01v8 pin 1 == 3
Model sky130_fd_pr__pfet_01v8 pin 1 == 3
No property mult found for device sky130_fd_pr__pfet_01v8
No property sa found for device sky130_fd_pr__pfet_01v8
No property sb found for device sky130_fd_pr__pfet_01v8
No property sd found for device sky130_fd_pr__pfet_01v8
No property nf found for device sky130_fd_pr__pfet_01v8
No property nrd found for device sky130_fd_pr__pfet_01v8
No property nrs found for device sky130_fd_pr__pfet_01v8
Model sky130_fd_pr__pfet_01v8 pin 1 == 3
Comparison output logged to file comp.out
Logging to file "comp.out" enabled
Contents of circuit 1:  Circuit: 'sky130_fd_pr__nfet_01v8'
Circuit sky130_fd_pr__nfet_01v8 contains 0 device instances.
Circuit contains 0 nets.
Contents of circuit 2:  Circuit: 'sky130_fd_pr__nfet_01v8'
Circuit sky130_fd_pr__nfet_01v8 contains 0 device instances.
Circuit contains 0 nets.

Circuit sky130_fd_pr__nfet_01v8 contains no devices.
Contents of circuit 1:  Circuit: 'sky130_fd_pr__pfet_01v8'
Circuit sky130_fd_pr__pfet_01v8 contains 0 device instances.
Circuit contains 0 nets.
Contents of circuit 2:  Circuit: 'sky130_fd_pr__pfet_01v8'
Circuit sky130_fd_pr__pfet_01v8 contains 0 device instances.
Circuit contains 0 nets.

Circuit sky130_fd_pr__pfet_01v8 contains no devices.
Contents of circuit 1:  Circuit: '5_Stage_MSSRO.spice'
Circuit 5_Stage_MSSRO.spice contains 0 device instances.
Circuit contains 0 nets.
Contents of circuit 2:  Circuit: '5_Stage_NSO_Xschem.spice'
Circuit 5_Stage_NSO_Xschem.spice contains 10 device instances.
  Class: sky130_fd_pr__nfet_01v8 instances:   5
  Class: sky130_fd_pr__pfet_01v8 instances:   5
Circuit contains 7 nets.

Circuit 5_Stage_MSSRO.spice contains no devices.
Result: Verify:  no current cell to verify.
Logging to file "comp.out" disabled
LVS Done.

Mitch Bailey

10/13/2021, 11:19 AM

Try this

netgen -batch lvs {"5_Stage_MSSRO.spice" 5_Stage_MSSRO} {"5_Stage_NSO_Xschem.spice" 5_Stage_MSSRO} /home/open_pdks/sky130/sky130A/libs.tech/netgen/sky130A_setup.tcl comp.out

Anchit Proch

10/14/2021, 4:34 AM

It worked! I wonder why it was not reading the layout cell

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